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Rathish Jayabharathi:
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Publications of Author
- Kee Sup Kim, Rathish Jayabharathi, Craig Carstens
SpeedGrade: An RTL Path Delay Fault Simulator. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 2001, pp:239-243 [Conf]
- M. M. Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
Implicit and Exact Path Delay Fault Grading in Sequential Circuits. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:990-995 [Conf]
- Rathish Jayabharathi, Thomas Thomas, Earl E. Swartzlander Jr.
A Comparative Evaluation of Adders Based on Performance and Testability. [Citation Graph (0, 0)][DBLP] ICCD, 1993, pp:314-317 [Conf]
- Kee Sup Kim, Rathish Jayabharathi, Craig Carstens, Praveen Vishakantaiah, Derek Feltham, Adrian Carbine
DPDAT: data path direct access testing. [Citation Graph (0, 0)][DBLP] ITC, 2001, pp:188-195 [Conf]
- Rathish Jayabharathi, Manuel A. d'Abreu, Jacob A. Abraham
FzCRITIC - A Functional Timing Verifier Using a Novel Fuzzy Delay Model. [Citation Graph (0, 0)][DBLP] VLSI Design, 1999, pp:232-235 [Conf]
- Abhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham
Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages. [Citation Graph (0, 0)][DBLP] VTS, 1996, pp:354-361 [Conf]
- Rathish Jayabharathi, Kyung Tek Lee, Jacob A. Abraham
A Novel Solution for Chip-Level Functional Timing Verification. [Citation Graph (0, 0)][DBLP] VTS, 1997, pp:137-142 [Conf]
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