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Hsing-Chung Liang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hsing-Chung Liang, Chung-Len Lee
    An Effective Methodology for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:173-178 [Conf]
  2. Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen
    Invalid State Identification for Sequential Circuit Test Generation. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1996, pp:10-15 [Conf]
  3. Hsing-Chung Liang, Le-Quen Tzeng
    Improved Representatives for Unrepairability Judging and Economic Repair Solutions of Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2006, pp:15- [Conf]
  4. Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen
    Partial Reset and Scan for Flip-Flops Based on States Requirement for Test Generation. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:341-347 [Conf]
  5. Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen
    Identifying Untestable Faults in Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:3, pp:14-23 [Journal]
  6. Hsing-Chung Liang, Chung-Len Lee
    Flip-Flop Selection for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 2000, v:16, n:5, pp:687-702 [Journal]
  7. Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen
    Identifying invalid states for sequential circuit test generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:9, pp:1025-1033 [Journal]
  8. Hsing-Chung Liang, Wen-Chin Ho, Ming-Chieh Cheng
    Identify unrepairability to speed-up spare allocation for repairing memories. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2005, v:54, n:2, pp:358-365 [Journal]

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