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Pedram A. Riahi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    The VPI-Based Combinational IP Core Module-Based Mixed Level Serial Fault Simulation and Test Generation Methodology. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:274-277 [Conf]
  2. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:139-143 [Conf]
  3. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    Simulating Faults of Combinational IP Core-based SOCs in a PLI Environment. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:389-397 [Conf]
  4. Shervin Sharifi, Mohammad Hosseinabady, Pedram A. Riahi, Zainalabedin Navabi
    Reducing Test Power, Time and Data Volume in SoC Testing Using Selective Trigger Scan Architecture. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:352-360 [Conf]

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