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Reinhold Weiss: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Klaus Rothbart, Ulrich Neffe, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    High Level Fault Injection for Attack Simulation in Smart Cards. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2004, pp:118-121 [Conf]
  2. Stefan Mitterdorfer, Egon Teiniker, Christian Kreiner, Reinhold Weiss, Zsolt Kovács
    XMI based Model Linking. [Citation Graph (0, 0)][DBLP]
    CAINE, 2003, pp:322-325 [Conf]
  3. Stefan Mitterdorfer, Egon Teiniker, Christian Kreiner, Zsolt Kovács, Reinhold Weiss
    Metamodel Code Generation for a Model Driven Architecture. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2004, pp:109-112 [Conf]
  4. Stefan Mitterdorfer, Egon Teiniker, Christian Kreiner, Reinhold Weiss, Zsolt Kovács
    A UML Model to Relational Database Mapping for Dynamic CORBA Component Model Persistency. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2002, pp:43-48 [Conf]
  5. Christian Kreiner, Christian Steger, Egon Teiniker, Reinhold Weiss
    A novel codesign approach based on distributed virtual machines. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:109-114 [Conf]
  6. Egon Teiniker, Robert Lechner, Gernot Schmoelzer, Christian Kreiner, Zsolt Kovács, Reinhold Weiss
    Towards a Contract Aware CORBA Component Container. [Citation Graph (0, 0)][DBLP]
    COMPSAC (1), 2005, pp:545-550 [Conf]
  7. Egon Teiniker, Stefan Mitterdorfer, Leif Morgan Johnson, Christian Kreiner, Zsolt Kovács, Reinhold Weiss
    A Test-Driven Component Development Framework based on the CORBA Component Model. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 2003, pp:400-405 [Conf]
  8. Ulrich Neffe, Klaus Rothbart, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    An Abstraction and Optimization Approach using HW/SW Co-design Techniques to get Power Aware Smart Card Solutions. [Citation Graph (0, 0)][DBLP]
    ESA, 2005, pp:137-143 [Conf]
  9. Christian Steger, Ulrich Neffe, Klaus Rothbart, Andreas Mühlberger, Edgar Rieger, Reinhold Weiss
    Methodologies for Designing Power-Aware Smart Card Systems. [Citation Graph (0, 0)][DBLP]
    Power-aware Computing Systems, 2005, pp:- [Conf]
  10. Ulrich Neffe, Klaus Rothbart, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    Energy Estimation Based on Hierarchical Bus Models for Power-Aware Smart Cards. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:300-305 [Conf]
  11. Bernhard Rinner, Martin Schmid, Reinhold Weiss
    Rapid Prototyping of Flexible Embedded Systems on Multi-DSP Architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10204-10211 [Conf]
  12. Gernot Schmoelzer, Christian Kreiner, Zsolt Kovács, Egon Teiniker, Reinhold Weiss
    Complex Model-Defined Constraints for Database Access with the Entity Container. [Citation Graph (0, 0)][DBLP]
    Databases and Applications, 2006, pp:1-6 [Conf]
  13. Christian Kreiner, Christian Steger, Egon Teiniker, Reinhold Weiss
    A HW/SW Codesign Framework Based on Distributed DSP Virtual Machines. [Citation Graph (0, 0)][DBLP]
    DSD, 2001, pp:212-219 [Conf]
  14. Christian Kreiner, Christian Steger, Reinhold Weiss
    WATIS2: Design and Application of an Environment Simulation System for Test Improvement of Control Software for Automatic Logistic Systems. [Citation Graph (0, 0)][DBLP]
    DS-RT, 2000, pp:5-12 [Conf]
  15. Klaus Rothbart, Ulrich Neffe, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    Power consumption profile analysis for security attack simulation in smart cards at high abstraction level. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:214-217 [Conf]
  16. Christian Kreiner, Christian Steger, Reinhold Weiss
    Improvement of Control Software for Automatic Logistic Systems Using Executable Environment Models. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:20919-20923 [Conf]
  17. Christian Kreiner, Christian Steger, Reinhold Weiss
    A Hardware/Software Cosimulation Environment for DSP Applications. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1492-1495 [Conf]
  18. Gernot Schmoelzer, Egon Teiniker, Stefan Mitterdorfer, Christian Kreiner, Zsolt Kovács, Reinhold Weiss
    Model-Driven Development of Recursive CORBA Component Assemblies. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2004, pp:170-175 [Conf]
  19. Egon Teiniker, Stefan Mitterdorfer, Christian Kreiner, Zsolt Kovács, Reinhold Weiss
    Local Components and Reuse of Legacy Code in the CORBA Component Model. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2002, pp:4-9 [Conf]
  20. Egon Teiniker, Gernot Schmoelzer, Joerg Faschingbauer, Christian Kreiner, Reinhold Weiss
    A Hybrid Component-Based System Development Process. [Citation Graph (0, 0)][DBLP]
    EUROMICRO-SEAA, 2005, pp:152-159 [Conf]
  21. Eugen Brenner, Reinhold Weiss
    A New Concept for Shared Memory Update in Parallel DSP and Transputer Systems. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1995, pp:279-284 [Conf]
  22. Marco Platzner, Bernhard Rinner, Reinhold Weiss
    Parallel Qualitative Simulation. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1995, pp:231-236 [Conf]
  23. M. Ruplitsch, Christian Steger, Reinhold Weiss
    A Hybrid Parallel Simulation System for Transputers. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1995, pp:273-278 [Conf]
  24. Gernot Schmoelzer, Stefan Mitterdorfer, Christian Kreiner, Joerg Faschingbauer, Zsolt Kovács, Egon Teiniker, Reinhold Weiss
    The Entity Container - An Object-Oriented and Model-Driven Persistency Cache. [Citation Graph (0, 0)][DBLP]
    HICSS, 2005, pp:- [Conf]
  25. Michael Böhnel, Reinhold Weiss
    Self-Stabilization Testing of LUT-Based FPGA Designs by Fault Injection. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2001, pp:139- [Conf]
  26. Reinhard Schneider, Reinhold Weiss
    Hardware Support for Simulated Annealing and Tabu Search. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:660-670 [Conf]
  27. Johannes Lauber, Christian Steger, Reinhold Weiss
    Autonomous Agents for Online Diagnosis of a Safety-critical System based on Probabilistic Causal Reasoning. [Citation Graph (0, 0)][DBLP]
    ISADS, 1999, pp:213-219 [Conf]
  28. Stefan Mitterdorfer, Egon Teiniker, Christian Kreiner, Reinhold Weiss, Zsolt Kovács
    A CORBA Persistent State Service based on a UML Model to a Relational Database Mapping. [Citation Graph (0, 0)][DBLP]
    ISDB, 2002, pp:55-60 [Conf]
  29. Erwin Duschnig, Reinhold Weiss
    Design of a Distributed Fault-Tolerant Computer Architecture Applied to the Traffic Control System "IVMS". [Citation Graph (0, 0)][DBLP]
    ISPAN, 1996, pp:341-344 [Conf]
  30. Alexander Maili, Christian Steger, Reinhold Weiss, Rob Quigley, Damian Dalton
    Reducing the Communication Bottleneck via On-Chip Cosimulation of Gate-Level HDL and C-Models on a Hardware Accelerator. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:290-291 [Conf]
  31. Gerald Kaefer, Josef Haid, Bernd Hofer, Gerhard Schall, Reinhold Weiss
    Framework for Power Aware Remote Processing: Design and Implementation of a Dynamic Power Estimation Unit. [Citation Graph (0, 0)][DBLP]
    ISWC, 2001, pp:159-160 [Conf]
  32. Gerald Kaefer, Guenter Prochart, Reinhold Weiss
    VECAS - A Virtually Enhanced Communication Assistance System for Application of Wearable Computing in Motor Racing . [Citation Graph (0, 0)][DBLP]
    ISWC, 2002, pp:160-161 [Conf]
  33. Gerald Kaefer, Guenter Prochart, Reinhold Weiss
    Wearable Alertness Monitoring for Industrial Applications. [Citation Graph (0, 0)][DBLP]
    ISWC, 2003, pp:254-255 [Conf]
  34. Klaus Rothbart, Ulrich Neffe, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    Extended abstract: an environment for design verification of smart card systems using attack simulation in SystemC. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2005, pp:253-254 [Conf]
  35. Ulrich Neffe, Klaus Rothbart, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
    A Flexible and Accurate Energy Model of an Instruction-Set Simulator for Secure Smart Card Software Design. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:491-500 [Conf]
  36. Gerald Kaefer, Josef Haid, K. Voit, Reinhold Weiss
    Architectural Software Power Estimation Support for Power Aware Remote Processing. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:315-320 [Conf]
  37. Marco Platzner, Bernhard Rinner, Reinhold Weiss
    A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs. [Citation Graph (0, 0)][DBLP]
    PDP, 1995, pp:311-318 [Conf]
  38. Christian Kreiner, Christian Steger, Reinhold Weiss
    Combining Different Models of Computation for Cosimulation of Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:751-757 [Conf]
  39. Johannes Lauber, Christian Steger, Reinhold Weiss
    Applied Probabilistic AI for Online Diagnosis of a Safety-Critical System Based on a Quality Assurance Program. [Citation Graph (0, 0)][DBLP]
    SAC, 1999, pp:25-30 [Conf]
  40. Marco Platzner, Bernhard Rinner, Reinhold Weiss
    Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim. [Citation Graph (0, 0)][DBLP]
    IEEE Intelligent Systems, 2000, v:15, n:2, pp:62-68 [Journal]
  41. Marco Platzner, Bernhard Rinner, Reinhold Weiss
    Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. [Citation Graph (0, 0)][DBLP]
    J. UCS, 1995, v:1, n:12, pp:811-820 [Journal]
  42. Bernhard Rinner, Martin Schmid, Reinhold Weiss
    A Rapid Prototyping Environment for Multi-DSP Systems based on Accurate Performance Prediction. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2004, v:10, n:2, pp:110-134 [Journal]
  43. Marco Platzner, Bernhard Rinner, Reinhold Weiss
    Parallel qualitative simulation. [Citation Graph (0, 0)][DBLP]
    Simul. Pr. Theory, 1997, v:5, n:7-8, pp:623-638 [Journal]
  44. Matthias Grumer, Manuel Wendt, Christian Steger, Reinhold Weiss, Ulrich Neffe, Andreas Mühlberger
    Automated Software Power Optimization for Smart Card Systems with Focus on Peak Reduction. [Citation Graph (0, 0)][DBLP]
    AICCSA, 2007, pp:506-512 [Conf]
  45. Claudia Mathis, Reinhold Weiss
    A real-time hardware scheduler embedded in a processor core. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 1999, pp:374-377 [Conf]
  46. Vojtech Derbek, Christian Steger, Reinhold Weiss, Daniel Wischounig, Josef Preishuber-Pfluegl, Markus Pistauer
    Simulation platform for UHF RFID. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:918-923 [Conf]
  47. Matthias Grumer, Manuel Wendt, Christian Steger, Reinhold Weiss, Ulrich Neffe, Andreas Mühlberger
    Automated Instruction Set Characterization and Power Profile Driven Software Optimization for Mobile Devices. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2007, pp:268-277 [Conf]

  48. Compiler-based Software Power Peak Elimination on Smart Card Systems. [Citation Graph (, )][DBLP]


  49. Fault insertion testing of a novel CPLD-based fail-safe system. [Citation Graph (, )][DBLP]


  50. Holistic simulation of FlexRay networks by using run-time model switching. [Citation Graph (, )][DBLP]


  51. Simulation Based Verification of Energy Storage Architectures for Higher Class Tags supported by Energy Harvesting Devices. [Citation Graph (, )][DBLP]


  52. Design and Implementation of Safety Functions on a Novel CPLD-Based Fail-Safe System Architecture. [Citation Graph (, )][DBLP]


  53. Rapid exploration of multimedia system-on-chips with automatically generated software performance models. [Citation Graph (, )][DBLP]


  54. Software Power Peak Reduction on Smart Card Systems Based on Iterative Compiling. [Citation Graph (, )][DBLP]


  55. Specification-based Verification of Embedded Systems by Automated Test Case Generation. [Citation Graph (, )][DBLP]


  56. TOSPIE2: tiny operating system plug-in for energy estimation. [Citation Graph (, )][DBLP]


  57. Energy Conservation with Network Coding for Wireless Sensor Networks with Multiple Crossed Information Flows. [Citation Graph (, )][DBLP]


  58. A system for accurate characterization of wireless sensor networks with power states and energy harvesting system efficiency. [Citation Graph (, )][DBLP]


  59. System level power profile analysis and optimization for smart cards and mobile devices. [Citation Graph (, )][DBLP]


  60. An emulation-based real-time power profiling unit for embedded software. [Citation Graph (, )][DBLP]


  61. Fast simulation based testing of anti-tearing mechanisms for small embedded systems. [Citation Graph (, )][DBLP]


  62. Verification and analysis of dependable automotive communication systems based on HW/SW co-simulation. [Citation Graph (, )][DBLP]


  63. Identification and Verification of Security Relevant Functions in Embedded Systems Based on Source Code Annotations and Assertions. [Citation Graph (, )][DBLP]


  64. Minesweeper for Sensor Networks-Making Event Detection in Sensor Networks Dependable. [Citation Graph (, )][DBLP]


  65. SystemC Based Design Space Exploration for Power Aware Smart Cards. [Citation Graph (, )][DBLP]


  66. Java Card Performance Optimization of Secure Transaction Atomicity Based on Increasing the Class Field Locality. [Citation Graph (, )][DBLP]


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