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Toshinobu Ono: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Toshinobu Ono, Akira Kozawa, Takashi Kimura, Yoshihiro Konno, Koji Saga
    An Application of Partial Scan Techniques to a High-End System LSI Design. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2001, pp:459- [Conf]
  2. Toshinobu Ono, Kazuo Wakui, Hitoshi Hikima, Yoshiyuki Nakamura, Masaaki Yoshida
    Integrated and Automated Design-for-Testability Implementation for Cell-Based ICs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:122-125 [Conf]
  3. Toshinobu Ono
    Selecting partial scan flip-flops for circuit partitioning. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:646-650 [Conf]
  4. Toshinobu Ono, Masaaki Yoshida
    A Test Generation Method for Sequential Circuits Based on Maximum Utilization of Internal States. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:75-82 [Conf]

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