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Kolin Paul: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kolin Paul, A. Roy, Prasanta Kumar Nandi, B. N. Roy, M. Deb Purkayastha, Santanu Chattopadhyay, Parimal Pal Chaudhuri
    Theory and Application of Multiple Attractor Cellular Automata for Fault Diagnosis. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:388-0 [Conf]
  2. Sanjay V. Rajopadhye, Kolin Paul
    A 1.5-D Architecture for Back-Propagation Training. [Citation Graph (0, 0)][DBLP]
    ERSA, 2005, pp:112-118 [Conf]
  3. Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri
    Cellular Automata Based Transform Coding for Image Compression. [Citation Graph (0, 0)][DBLP]
    HiPC, 1999, pp:269-273 [Conf]
  4. Nilesh Padhariya, Kolin Paul, Dheeraj Bhardwaj
    A FLOPs Based Model for Performance Analysis and Scheduling of Applications for Single and Multiple CPUs. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2006, pp:455-464 [Conf]
  5. Kolin Paul
    An FPGA Based Test Bed for Bio Inspired Computation. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  6. Rahul Jain, Anindita Mukherjee, Kolin Paul
    Defect-Aware Design Paradigm for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:91-96 [Conf]
  7. Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury, Kolin Paul, Biplab K. Sikdar
    Theory and Applications of Cellular Automata for VLSI Design and Testing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:4- [Conf]
  8. Kolin Paul, Dipanwita Roy Chowdhury
    Application of GF(2p) CA in Burst Error Correcting Codes. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:562-567 [Conf]
  9. Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury
    Scalable Pipelined Micro-Architecture for Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:144-0 [Conf]
  10. Kolin Paul, P. Dutta, Dipanwita Roy Chowdhury, Prasanta Kumar Nandi, Parimal Pal Chaudhuri
    A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:532-537 [Conf]
  11. Kolin Paul, Ranadeep Ghosal, Biplab K. Sikdar, Santashil Pal Chaudhuri, Dipanwita Roy Chowdhury
    GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:140-143 [Conf]
  12. Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee
    Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:556-561 [Conf]
  13. Nagaraju Pothineni, Anshul Kumar, Kolin Paul
    Application Specific Datapath Extension with Distributed I/O Functional Units. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:551-558 [Conf]
  14. Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri
    Theory of Extended Linear Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:9, pp:1106-1110 [Journal]

  15. Android on Mobile Devices: An Energy Perspective. [Citation Graph (, )][DBLP]


  16. Recurring Pattern Identification and its Application to Instruction Set Extension. [Citation Graph (, )][DBLP]


  17. Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration. [Citation Graph (, )][DBLP]


  18. A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. [Citation Graph (, )][DBLP]


  19. Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors. [Citation Graph (, )][DBLP]


  20. Clocking-Based Coplanar Wire Crossing Scheme for QCA. [Citation Graph (, )][DBLP]


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