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Wang-Dauh Tseng: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wang-Dauh Tseng, Kuochen Wang
    Testable Design and Testing of MCMs Based on Multifrequency Scan. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1996, pp:75-0 [Conf]
  2. I-Shyan Hwang, Meng-Yuan Tu, Wang-Dauh Tseng, Zen-Der Shyu
    A novel dynamic fault restoration mechanism using cluster allocation approach in WDM mesh networks. [Citation Graph (0, 0)][DBLP]
    Computer Communications, 2006, v:29, n:18, pp:3921-3932 [Journal]
  3. Wang-Dauh Tseng, Kuochen Wang
    Fuzzy-based CMOS circuit partitioning in built-in current testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:116-120 [Journal]
  4. Wang-Dauh Tseng
    Generation of Primary Input Blocking Pattern for Power Minimization during Scan Testing. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2007, v:23, n:1, pp:75-84 [Journal]

  5. A Multi-dimensional Pattern Run-Length Method for Test Data Compression. [Citation Graph (, )][DBLP]

  6. Deterministic Built-In Self-Test Using Multiple Linear Feedback Shift Registers for Low-Power Scan Testing. [Citation Graph (, )][DBLP]

  7. Reduction of Power Dissipation during Scan Testing by Test Vector Ordering. [Citation Graph (, )][DBLP]

  8. Printed circuit board routing and package layout codesign. [Citation Graph (, )][DBLP]

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