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Ioannis Voyiatzis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ioannis Voyiatzis, Dimitris Nikolos, Antonis M. Paschalis, Constantinos Halatsis, Th. Haniotakis
    An efficient comparative concurrent Built-In Self-Test technique. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1995, pp:309-315 [Conf]
  2. Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis
    Accumulator-Based Weighted Pattern Generation. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:215-220 [Conf]
  3. Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantinos Halatsis
    R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:918-925 [Conf]
  4. Ioannis Voyiatzis
    Test Vector Embedding into Accumulator-Generated Sequences: A Linear-Time Solution. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:4, pp:476-484 [Journal]
  5. Ioannis Voyiatzis, Constantin Halatsis
    A Low-Cost Concurrent BIST Scheme for Increased Dependability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Dependable Sec. Comput., 2005, v:2, n:2, pp:150-156 [Journal]
  6. Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis
    Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:9, pp:1079-1086 [Journal]
  7. Ioannis Voyiatzis
    A counter-based pseudo-exhaustive pattern generator for BIST applications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2004, v:35, n:11, pp:927-935 [Journal]
  8. Ioannis Voyiatzis
    Embedding test patterns into Low-Power BIST sequences. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:197-198 [Conf]
  9. Ioannis Voyiatzis
    Accumulator-based pseudo-exhaustive two-pattern generation. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:11, pp:846-860 [Journal]
  10. Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis
    A concurrent built-in self-test architecture based on a self-testing RAM. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2005, v:54, n:1, pp:69-78 [Journal]

  11. A Low-Cost Accumulator-Based Test Pattern Generation Architecture. [Citation Graph (, )][DBLP]


  12. An Input Vector Monitoring Concurrent BIST scheme exploiting . [Citation Graph (, )][DBLP]


  13. Embedding Test Patterns in Accumulator-Generated Sequences in O(1) Time. [Citation Graph (, )][DBLP]


  14. Reliability considerations in mobile devices. [Citation Graph (, )][DBLP]


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