The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Maurice Lousberg: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tom Waayers, Erik Jan Marinissen, Maurice Lousberg
    IEEE Std 1500 Compliant Infrastructure forModular SOC Testing. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2005, pp:450- [Conf]
  2. Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen
    Memory Testing Under Different Stress Conditions: An Industrial Evaluation. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:438-443 [Conf]
  3. Alex Biewenga, Henk D. L. Hollmann, Frans de Jong, Maurice Lousberg
    Static component interconnect test technology (SCITT) a new technology for assembly testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:439-448 [Conf]
  4. Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg
    An Effective Diagnosis Method to Support Yield Improvement. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:260-269 [Conf]
  5. Rohit Kapur, Maurice Lousberg, Tony Taylor, Brion L. Keller, Paul Reuter, Douglas Kay
    CTL the language for describing core-based test. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:131-139 [Conf]
  6. Erik Jan Marinissen, Robert G. J. Arendsen, Gerard Bos, Hans Dingemanse, Maurice Lousberg, Clemens Wouters
    A structured and scalable mechanism for test access to embedded reusable cores. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:284-293 [Conf]
  7. Will Moore, Guido Gronthoud, Keith Baker, Maurice Lousberg
    Delay-fault testing and defects in deep sub-micron ICs-does critical resistance really mean anything? [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:95-104 [Conf]
  8. Yervant Zorian, Erik Jan Marinissen, Maurice Lousberg, Sandeep Kumar Goel
    Wrapper design for embedded core test. [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:911-920 [Conf]
  9. Dwayne Burek, Garen Darbinyan, Rohit Kapur, Maurice Lousberg, Teresa L. McLaurin, Mike Ricchetti
    IP and Automation to Support IEEE P1500. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:411-412 [Conf]
  10. Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg
    A New Algorithm for Dynamic Faults Detection in RAMs. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:177-182 [Conf]
  11. Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger
    Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:345-350 [Conf]
  12. D. Arumi, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
    Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:145-150 [Conf]
  13. Rosa Rodríguez-Montañés, D. Arumi, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
    Diagnosis of Full Open Defects in Interconnecting Lines. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:158-166 [Conf]
  14. Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen
    Memory Testing Under Different Stress Conditions: An Industrial Evaluation [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002