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Wei-Lun Wang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Wei-Lun Wang
March Based Memory Core Test Scheduling for SOC. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2004, pp:248-253 [Conf] - Wei-Lun Wang, Kuen-Jong Lee
Accelerated test pattern generators for mixed-mode BIST environments. [Citation Graph (0, 0)][DBLP]
Asian Test Symposium, 2000, pp:368-373 [Conf] - Wei-Lun Wang, Jhing-Fa Wang, Kuen-Jong Lee
A Fast Testing Method for Sequential Circuits at the State Trasition Level. [Citation Graph (0, 0)][DBLP]
ITC, 1992, pp:514-519 [Conf] - Kuen-Jong Lee, Wei-Lun Wang, Jhing-Fa Wang
A General Structure of Feedback Shift Registers for Built-In Self Test. [Citation Graph (0, 0)][DBLP]
J. Inf. Sci. Eng., 1998, v:14, n:3, pp:645-667 [Journal] - Wei-Lun Wang, Kuen-Jong Lee, Jhing-Fa Wang
An on-chip march pattern generator for testing embedded memory cores. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2001, v:9, n:5, pp:730-735 [Journal]
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