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Yong-sheng Wang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yong-sheng Wang, Jin-xiang Wang, Feng-chang Lai, Yizheng Ye
    Optimal Schemes for ADC BIST Based on Histogram. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2005, pp:52-57 [Conf]
  2. Yong-sheng Wang, Liyi Xiao, Mingyan Yu, Jin-xiang Wang, Yizheng Ye
    A Test Architecture for System-on-a-Chip. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:506- [Conf]
  3. Bin Zhou, Yizheng Ye, Yong-sheng Wang
    Simultaneous reduction in test data volume and test time for TRC-reseeding. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:49-54 [Conf]

  4. A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata. [Citation Graph (, )][DBLP]


  5. A 1-V piecewise curvature-corrected CMOS bandgap reference. [Citation Graph (, )][DBLP]


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