The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Mingyan Yu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yong-sheng Wang, Liyi Xiao, Mingyan Yu, Jin-xiang Wang, Yizheng Ye
    A Test Architecture for System-on-a-Chip. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:506- [Conf]
  2. Zhiyuan Li, FengChang Lai, Mingyan Yu
    Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:123-126 [Conf]
  3. Qianneng Zhou, FengChang Lai, Mingyan Yu
    On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:140-143 [Conf]
  4. Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu
    Large tuning band range of high frequency filter for wireless applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:384-387 [Conf]
  5. Zhiyuan Li, Mingyan Yu, Jianguo Ma
    A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:563-568 [Conf]
  6. Tong Zhou, Mingyan Yu, Yizheng Ye
    A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:216-221 [Conf]
  7. Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma
    A CMOS bandpass filter with wide-tuning range for wireless applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  8. Guochi Huang, Tae-sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye
    Post linearization of CMOS LNA using double cascade FETs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  9. Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. [Citation Graph (, )][DBLP]


  10. Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. [Citation Graph (, )][DBLP]


  11. A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002