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Shiyi Xu :
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Shiyi Xu , Jianhua Gao An Efficient Random-like Testing. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 1998, pp:504-0 [Conf ] Shiyi Xu , Tukwasibwe Justaf Frank An Evaluation of Test Generation Algorithms for combinational Circuits. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 1999, pp:63-69 [Conf ] Shiyi Xu , Peter Waignjo , Percy G. Dias , Bole Shi Testability Prediction for Sequential Circuits Using Neural Network. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 1997, pp:48-0 [Conf ] Shiyi Xu Non-exhaustive Parity Testing. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2001, pp:468- [Conf ] Shiyi Xu Build-In-Self-Test for Software. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2003, pp:220-223 [Conf ] Shiyi Xu A Systematic Way of Functional Testing for VLSI Chips. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2004, pp:170-175 [Conf ] Shiyi Xu Pseudo-Parity Testing with Testable Design. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2005, pp:354-359 [Conf ] Shiyi Xu , Wei Cen Forecasting the efficiency of test generation algorithms for digital circuits. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2000, pp:179-0 [Conf ] Shiyi Xu , Jianwen Chen Maximum Distance Testing. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2002, pp:15-0 [Conf ] Shiyi Xu , Gercy P. Dias Testability forecasting for sequential circuits. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 1995, pp:199-205 [Conf ] Shiyi Xu A New Approach to Improving the Test Effectiveness in Software Testing Using Fault Collapsing. [Citation Graph (0, 0)][DBLP ] PRDC, 2006, pp:73-80 [Conf ] Shiyi Xu High-Order Syndrome Testing for VLSI Circuits. [Citation Graph (0, 0)][DBLP ] PRDC, 2005, pp:101-108 [Conf ] Debesh K. Das , Hideo Fujiwara , Yungang Li , Yinghua Min , Shiyi Xu , Yervant Zorian Design & Test Education in Asia. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2004, v:21, n:4, pp:331-338 [Journal ] Shiyi Xu , Tukwasibwe Justaf Frank Forecasting the Efficiency of Test Generation Algorithms for Combinational Circuits. [Citation Graph (0, 0)][DBLP ] J. Comput. Sci. Technol., 2000, v:15, n:4, pp:326-337 [Journal ] Shiyi Xu , Stephen Y. H. Su Detecting I/O and Internal Feedback Bridging Faults. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1985, v:34, n:6, pp:553-557 [Journal ] An Accurate Model of Software Reliability. [Citation Graph (, )][DBLP ] A Synthesis Software Reliability Model. [Citation Graph (, )][DBLP ] Orderly Random Testing for Both Hardware and Software. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs