
Search the dblp DataBase
Toshinobu Kashiwabara:
[Publications]
[Author Rank by year]
[Coauthors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
 Atsushi Moritomo, Kiyoharu Hamaguchi, Toshinobu Kashiwabara
Validity Checking for QuantifierFree FirstOrder Logic with Equality Using Substitution of Boolean Formulas. [Citation Graph (0, 0)][DBLP] ATVA, 2004, pp:108119 [Conf]
 Masaki Nakanishi, Kiyoharu Hamaguchi, Toshinobu Kashiwabara
Ordered Quantum Branching Programs Are More Powerful than Ordered Probabilistic Branching Programs under a BoundedWidth Restriction. [Citation Graph (0, 0)][DBLP] COCOON, 2000, pp:467476 [Conf]
 Kiyoharu Hamaguchi, Hidekazu Urushihara, Toshinobu Kashiwabara
Symbolic Checking of SignalTransition Consistency for Verifying HighLevel Designs. [Citation Graph (0, 0)][DBLP] FMCAD, 2000, pp:455469 [Conf]
 Toshinobu Kashiwabara
Algorithms for some intersection graphs. [Citation Graph (0, 0)][DBLP] Graph Theory and Algorithms, 1980, pp:171181 [Conf]
 Toshinobu Kashiwabara, Sumio Masuda, Kazuo Nakajima, Toshio Fujisawa
Generation of Maximum Independent Sets of a Bipartite Graph and Maximum Cliques of a CircularArc Graph. [Citation Graph (0, 0)][DBLP] J. Algorithms, 1992, v:13, n:1, pp:161174 [Journal]
 Tatsuo Ohtsuki, Hajimu Mori, Toshinobu Kashiwabara, Toshio Fujisawa
On Minimal Augmentation of a Graph to Obtain an Interval Graph. [Citation Graph (0, 0)][DBLP] J. Comput. Syst. Sci., 1981, v:22, n:1, pp:6097 [Journal]
 Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Thio Fujisawa
Crossing Minimization in Linear Embeddings of Graphs. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1990, v:39, n:1, pp:124127 [Journal]
 Chong S. Rim, Toshinobu Kashiwabara, Kazuo Nakajima
Exact algorithms for multilayer topological via minimization. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:11, pp:11651173 [Journal]
Approximate Invariant Property Checking Using TermHeight Reduction for a Subset of FirstOrder Logic. [Citation Graph (, )][DBLP]
Automatic monitor generation from regular expression based specifications for module interface verification. [Citation Graph (, )][DBLP]
Search in 0.002secs, Finished in 0.003secs
