The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Nicholas Seegmiller: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Scott Little, David Walter, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda
    Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. [Citation Graph (0, 0)][DBLP]
    ATVA, 2004, pp:426-440 [Conf]
  2. Scott Little, Nicholas Seegmiller, David Walter, Chris J. Myers, Tomohiro Yoneda
    Verification of analog/mixed-signal circuits using labeled hybrid petri nets. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:275-282 [Conf]
  3. Chris J. Myers, Reid R. Harrison, David Walter, Nicholas Seegmiller, Scott Little
    The Case for Analog Circuit Verification. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2006, v:153, n:3, pp:53-63 [Journal]

  4. Symbolic Model Checking of Analog/Mixed-Signal Circuits. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002