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Yu Cao :
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Derong Shen , Ge Yu , Yu Cao , Yue Kou , Tiezheng Nie An Effective Web Services Discovery Strategy for Web Services Composition. [Citation Graph (0, 0)][DBLP ] CIT, 2005, pp:257-263 [Conf ] Derong Shen , Ge Yu , Tiezheng Nie , Yue Kou , Yu Cao , Meifang Li An Effective Service Discovery Model for Highly Reliable Web Services Composition in a Specific Domain. [Citation Graph (0, 0)][DBLP ] APWeb, 2006, pp:886-892 [Conf ] Sarvesh Bhardwaj , Yu Cao , Sarma B. K. Vrudhula Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2006, pp:953-958 [Conf ] Kanak Agarwal , Yu Cao , Takashi Sato , Dennis Sylvester , Chenming Hu Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2002, pp:77-86 [Conf ] Yu Cao , Wallapak Tavanapong , Kihwan Kim , Jung-Hwan Oh Audio-Assisted Scene Segmentation for Story Browsing. [Citation Graph (0, 0)][DBLP ] CIVR, 2003, pp:446-455 [Conf ] Yu Cao , Wallapak Tavanapong , Dalei Li , Jung-Hwan Oh , Piet C. de Groen , Johnny S. Wong A Visual Model Approach for Parsing Colonoscopy Videos. [Citation Graph (0, 0)][DBLP ] CIVR, 2004, pp:160-169 [Conf ] Sarvesh Bhardwaj , Sarma B. K. Vrudhula , Praveen Ghanta , Yu Cao Modeling of intra-die process variations for accurate analysis and optimization of nano-scale circuits. [Citation Graph (0, 0)][DBLP ] DAC, 2006, pp:791-796 [Conf ] Andrew E. Caldwell , Yu Cao , Andrew B. Kahng , Farinaz Koushanfar , Hua Lu , Igor L. Markov , Michael Oliver , Dirk Stroobandt , Dennis Sylvester GTX: the MARCO GSRC technology extrapolation system. [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:693-698 [Conf ] Yu Cao , Lawrence T. Clark Mapping statistical process variations toward circuit performance variability: an analytical modeling approach. [Citation Graph (0, 0)][DBLP ] DAC, 2005, pp:658-663 [Conf ] Rakesh Vattikonda , Wenping Wang , Yu Cao Modeling and minimization of PMOS NBTI effect for robust nanometer design. [Citation Graph (0, 0)][DBLP ] DAC, 2006, pp:1047-1052 [Conf ] Tarun Sairam , Wei Zhao , Yu Cao Optimizing finfet technology for high-speed and low-power design. [Citation Graph (0, 0)][DBLP ] ACM Great Lakes Symposium on VLSI, 2007, pp:73-77 [Conf ] Yu Cao , Chenming Hu , Xuejue Huang , Andrew B. Kahng , Sudhakar Muddu , Dirk Stroobandt , Dennis Sylvester Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. [Citation Graph (0, 0)][DBLP ] ICCAD, 2000, pp:56-61 [Conf ] Yu Cao , Xiao-Dong Yang , Xuejue Huang , Dennis Sylvester Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis. [Citation Graph (0, 0)][DBLP ] ICCAD, 2003, pp:848-854 [Conf ] Brian Cline , Kaviraj Chopra , David Blaauw , Yu Cao Analysis and modeling of CD variation for statistical static timing. [Citation Graph (0, 0)][DBLP ] ICCAD, 2006, pp:60-66 [Conf ] Jinhui Chen , Lawrence T. Clark , Yu Cao Robust Design of High Fan-In/Out Subthreshold Circuits. [Citation Graph (0, 0)][DBLP ] ICCD, 2005, pp:405-410 [Conf ] Yu Cao , Wallapak Tavanapong , Kihwan Kim , Johnny Wong , Jung-Hwan Oh , Piet C. de Groen A framework for parsing colonoscopy videos for semantic units. [Citation Graph (0, 0)][DBLP ] ICME, 2004, pp:1879-1882 [Conf ] Zile Wei , Yu Cao , A. Richard Newton Digital Image Restoration by Exposure-Splitting and Registration. [Citation Graph (0, 0)][DBLP ] ICPR (4), 2004, pp:657-660 [Conf ] Jie Bao , Yu Cao , Wallapak Tavanapong , Vasant Honavar Integration of Domain-Specific and Domain-Independent Ontologies for Colonoscopy Video Database Annotation. [Citation Graph (0, 0)][DBLP ] IKE, 2004, pp:82-90 [Conf ] Shoujue Wang , Yu Cao , Yi Huang High-Dimensional Space Geometrical Informatics and Its Applications to Image Restoration. [Citation Graph (0, 0)][DBLP ] ISNN (2), 2006, pp:569-574 [Conf ] Shoujue Wang , Yi Huang , Yu Cao Study on Text-Dependent Speaker Recognition Based on Biomimetic Pattern Recognition. [Citation Graph (0, 0)][DBLP ] ISNN (2), 2006, pp:158-164 [Conf ] Yu Cao , Xuejue Huang , Chenming Hu , Norman Chang , Shen Lin , O. Sam Nakagawa , Weize Xie Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. [Citation Graph (0, 0)][DBLP ] ISQED, 2001, pp:185-190 [Conf ] Min Chen , Yu Cao Analysis of Pulse Signaling for Low-Power On-Chip Global Bus Design. [Citation Graph (0, 0)][DBLP ] ISQED, 2006, pp:401-406 [Conf ] Sarvesh Bhardwaj , Yu Cao , Sarma B. K. Vrudhula LOTUS: Leakage Optimization under Timing Uncertainty for Standard-cell designs. [Citation Graph (0, 0)][DBLP ] ISQED, 2006, pp:717-722 [Conf ] Paul Friedberg , Yu Cao , Jason Cain , Ruth Wang , Jan M. Rabaey , Costas J. Spanos Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization. [Citation Graph (0, 0)][DBLP ] ISQED, 2005, pp:516-521 [Conf ] Huifang Qin , Yu Cao , Dejan Markovic , Andrei Vladimirescu , Jan M. Rabaey SRAM Leakage Suppression by Minimizing Standby Supply Voltage. [Citation Graph (0, 0)][DBLP ] ISQED, 2004, pp:55-60 [Conf ] Wei Zhao , Yu Cao New Generation of Predictive Technology Model for Sub-45nm Design Exploration. [Citation Graph (0, 0)][DBLP ] ISQED, 2006, pp:585-590 [Conf ] Rakesh Vattikonda , Yansheng Luo , Alex Gyure , Xiaoning Qi , Sam C. Lo , Mahmoud Shahram , Yu Cao , Kishore Singhal , Dino Toffolon A New Simulation Method for NBTI Analysis in SPICE Environment. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:41-46 [Conf ] Asha Balijepalli , Joseph Ervin , Yu Cao , Trevor Thornton Compact Modeling of a PD SOI MESFET for Wide Temperature Designs. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:133-138 [Conf ] Yu Cao , Dalei Li , Wallapak Tavanapong , Jung-Hwan Oh , Johnny Wong , Piet C. de Groen Parsing and browsing tools for colonoscopy videos. [Citation Graph (0, 0)][DBLP ] ACM Multimedia, 2004, pp:844-851 [Conf ] Sae Hwang , Jung-Hwan Oh , JeongKyu Lee , Yu Cao , Wallapak Tavanapong , Danyu Liu , Johnny Wong , Piet C. de Groen Automatic measurement of quality metrics for colonoscopy videos. [Citation Graph (0, 0)][DBLP ] ACM Multimedia, 2005, pp:912-921 [Conf ] Kanak Agarwal , Yu Cao , Takashi Sato , Dennis Sylvester , Chenming Hu Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2002, pp:77-0 [Conf ] Takashi Sato , Yu Cao , Kanak Agarwal , Dennis Sylvester , Chenming Hu Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:5, pp:560-572 [Journal ] Yu Cao , Paul P. B. Eggermont , Susan Terebey Cross Burg entropy maximization and its application to ringing suppression in image reconstruction. [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Image Processing, 1999, v:8, n:2, pp:286-292 [Journal ] Yu Cao , Xuejue Huang , Dennis Sylvester , Tsu-Jae King , Chenming Hu Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2005, v:13, n:1, pp:158-162 [Journal ] Yu Cao , Xiao-Dong Yang , Xuejue Huang , Dennis Sylvester Switch-factor based loop RLC modeling for efficient timing analysis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2005, v:13, n:9, pp:1072-1078 [Journal ] Huifang Qin , Yu Cao , Dejan Markovic , Andrei Vladimirescu , Jan M. Rabaey Standby supply voltage minimization for deep sub-micron SRAM. [Citation Graph (0, 0)][DBLP ] Microelectronics Journal, 2005, v:36, n:9, pp:789-800 [Journal ] Ritu Singhal , Asha Balijepalli , Anupama Subramaniam , Frank Liu , Sani R. Nassif , Yu Cao Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. [Citation Graph (0, 0)][DBLP ] DAC, 2007, pp:823-828 [Conf ] Wenping Wang , Shengqi Yang , Sarvesh Bhardwaj , Rakesh Vattikonda , Sarma B. K. Vrudhula , Frank Liu , Yu Cao The Impact of NBTI on the Performance of Combinational and Sequential Circuits. [Citation Graph (0, 0)][DBLP ] DAC, 2007, pp:364-369 [Conf ] Min Chen , Wei Zhao , Frank Liu , Yu Cao Fast statistical circuit analysis with finite-point based transistor model. [Citation Graph (0, 0)][DBLP ] DATE, 2007, pp:1391-1396 [Conf ] Wei Zhao , Yu Cao Predictive technology model for nano-CMOS design exploration. [Citation Graph (0, 0)][DBLP ] JETC, 2007, v:3, n:1, pp:- [Journal ] Yu Cao , Xuejue Huang , N. H. Chang , Shen Lin , O. Sam Nakagawa , Weize Xie , Dennis Sylvester , Chenming Hu Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:799-805 [Journal ] Yu Cao , Chenming Hu , Xuejue Huang , Andrew B. Kahng , Igor L. Markov , Michael Oliver , Dirk Stroobandt , Dennis Sylvester Improved a priori interconnect predictions and technology extrapolation in the GTX system. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2003, v:11, n:1, pp:3-14 [Journal ] Danyu Liu , Yu Cao , Kihwan Kim , Sean Stanek , Bancha Doungratanaex-Chai , Kungen Lin , Wallapak Tavanapong , Johnny S. Wong , Jung-Hwan Oh , Piet C. de Groen Arthemis: Annotation software in an integrated capturing and analysis system for colonoscopy. [Citation Graph (0, 0)][DBLP ] Computer Methods and Programs in Biomedicine, 2007, v:88, n:2, pp:152-163 [Journal ] Huifang Qin , Rakesh Vattikonda , Thuan Trinh , Yu Cao , Jan M. Rabaey SRAM Cell Optimization for Ultra-Low Power Standby. [Citation Graph (0, 0)][DBLP ] J. Low Power Electronics, 2006, v:2, n:3, pp:401-411 [Journal ] Sarvesh Bhardwaj , Yu Cao , Sarma B. K. Vrudhula Statistical Leakage Minimization of Digital Circuits Using Gate Sizing, Gate Length Biasing, Threshold Voltage Selection. [Citation Graph (0, 0)][DBLP ] J. Low Power Electronics, 2006, v:2, n:2, pp:240-250 [Journal ] A framework for estimating NBTI degradation of microarchitectural components. [Citation Graph (, )][DBLP ] Design rule optimization of regular layout for leakage reduction in nanoscale design. [Citation Graph (, )][DBLP ] Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness. [Citation Graph (, )][DBLP ] Variability analysis under layout pattern-dependent rapid-thermal annealing process. [Citation Graph (, )][DBLP ] In-situ characterization and extraction of SRAM variability. [Citation Graph (, )][DBLP ] Gate replacement techniques for simultaneous leakage and aging optimization. [Citation Graph (, )][DBLP ] A resilience roadmap. [Citation Graph (, )][DBLP ] Optimized self-tuning for circuit aging. [Citation Graph (, )][DBLP ] MOSFET modeling for 45nm and beyond. [Citation Graph (, )][DBLP ] An efficient method to identify critical gates under circuit aging. [Citation Graph (, )][DBLP ] A robust finite-point based gate model considering process variations. [Citation Graph (, )][DBLP ] Modeling of layout-dependent stress effect in CMOS design. [Citation Graph (, )][DBLP ] Optimized query evaluation using cooperative sorts. [Citation Graph (, )][DBLP ] Audio-visual event classification via spatial-temporal-audio words. [Citation Graph (, )][DBLP ] Compact modeling of carbon nanotube transistor for early stage process-design exploration. [Citation Graph (, )][DBLP ] Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. [Citation Graph (, )][DBLP ] Workload-aware neuromorphic design of low-power supply voltage controller. [Citation Graph (, )][DBLP ] Workload-adaptive process tuning strategy for power-efficient multi-core processors. [Citation Graph (, )][DBLP ] Medical Video Event Classification Using Shared Features. [Citation Graph (, )][DBLP ] A Semantics- and Data-Driven SOA for Biomedical Multimedia Systems. [Citation Graph (, )][DBLP ] Finite-Point Gate Model for Fast Timing and Power Analysis. [Citation Graph (, )][DBLP ] A Simplified Model of Carbon Nanotube Transistor with Applications to Analog and Digital Design. [Citation Graph (, )][DBLP ] Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect. [Citation Graph (, )][DBLP ] Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations. [Citation Graph (, )][DBLP ] On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. [Citation Graph (, )][DBLP ] An integrated machine learning approach to stroke prediction. [Citation Graph (, )][DBLP ] Optimizing complex queries with multiple relation instances. [Citation Graph (, )][DBLP ] Further Investigation on Pilot Design for MIMO OFDM Systems in Multi-cell Environment. [Citation Graph (, )][DBLP ] Range-free Distance Estimate Methods using Neighbor Information in Wireless Sensor Networks. [Citation Graph (, )][DBLP ] Semantic Image Classification for Medical Videos. [Citation Graph (, )][DBLP ] A Theoretic Framework for Object Class Tracking. [Citation Graph (, )][DBLP ] Mining the Royal Portrait Miniature for the Art Historical Context. [Citation Graph (, )][DBLP ] Reliable Systems on Unreliable Fabrics. [Citation Graph (, )][DBLP ] Guest Editors' Introduction: Reliability Challenges in Nano-CMOS Design. [Citation Graph (, )][DBLP ] Guest Editors' Introduction: Compact Variability Modeling in Scaled CMOS Design. [Citation Graph (, )][DBLP ] Search in 0.006secs, Finished in 0.010secs