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Felipe Ribeiro Schneider: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Felipe R. Schneider, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis
    Exact lower bound for the number of switches in series to implement a combinational logic cell. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:357-362 [Conf]
  2. Felipe R. Schneider, Vinícius P. Correia, Renato P. Ribas, André Inácio Reis
    Comparing Transistor-Level Implementations of 4-Input Logic Functions. [Citation Graph (0, 0)][DBLP]
    IWLS, 2002, pp:361-365 [Conf]
  3. Renato E. B. Poli, Felipe R. Schneider, Renato P. Ribas, André Inácio Reis
    Unified Theory to Build Cell-Level Transistor Networks from BDDs. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:199-204 [Conf]

  4. Switch level optimization of digital CMOS gate networks. [Citation Graph (, )][DBLP]


  5. A comparative study of CMOS gates with minimum transistor stacks. [Citation Graph (, )][DBLP]


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