The SCEAS System
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Search the dblp DataBase
Tzu-Der Chuang:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
A 100 MHz 1920×1080 HD-Photo 20 frames/sec JPEG XR encoder design. [Citation Graph (, )][DBLP]
Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding. [Citation Graph (, )][DBLP]
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder. [Citation Graph (, )][DBLP]
Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension. [Citation Graph (, )][DBLP]
Bandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control. [Citation Graph (, )][DBLP]
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for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002
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