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Chenglian Peng:
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Publications of Author
- Bo Zhou, Weidong Qiu, Chenlian Peng
An Operating System Framework for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP] CIT, 2005, pp:788-792 [Conf]
- Ying Wang, Xuegong Zhou, Bo Zhou, Liang Liang, Chenglian Peng
A MDA based SoC Modeling Approach using UML and SystemC. [Citation Graph (0, 0)][DBLP] CIT, 2006, pp:245- [Conf]
- Chenglian Peng, Baifeng Wu, Xiaoguang Sun
Test by Distributed Monitoring. [Citation Graph (0, 0)][DBLP] Asian Test Symposium, 1999, pp:218-0 [Conf]
- Yan Chen, Xuan Du, Xuegong Zhou, Chenglian Peng
An Automatic Coverage Analysis for SystemC Using UML and Aspect-Oriented Technology. [Citation Graph (0, 0)][DBLP] CSCWD (Selected papers), 2004, pp:398-405 [Conf]
- Bo Zhou, Yonghui Chen, Weidong Qiu, Yan Chen, Chenglian Peng
Reduce SW/HW Migration Efforts by a RTOS in Multi-FPGA Systems. [Citation Graph (0, 0)][DBLP] CSCWD (Selected papers), 2005, pp:636-645 [Conf]
- Liang Liang, Bo Zhou, Xuegong Zhou, Chenglian Peng
System Prototyping Based on SystemC Transaction-Level Modeling. [Citation Graph (0, 0)][DBLP] IMSCCS (2), 2006, pp:764-770 [Conf]
- Jianhui Jiang, Yinghua Min, Chenglian Peng
Fault-Tolerant Systems with Concurrent Error-Locating Capability. [Citation Graph (0, 0)][DBLP] J. Comput. Sci. Technol., 2003, v:18, n:2, pp:190-200 [Journal]
Enabling Reconfigurable SoC in Multimedia Processing. [Citation Graph (, )][DBLP]
Online Hybrid Task Scheduling in Reconfigurable Systems. [Citation Graph (, )][DBLP]
Online Task Scheduling for Heterogeneous Reconfigurable Systems. [Citation Graph (, )][DBLP]
Component Priority Assignment in tha Data Flow Dominated Embedded Systems with Timing Constraints. [Citation Graph (, )][DBLP]
ESIDE - embedded system integrated design environment based on Eclipse platform. [Citation Graph (, )][DBLP]
SHUM-uCOS: A RTOS using multi-task model to reduce migration cost between SW/HW tasks. [Citation Graph (, )][DBLP]
Fast on-line real-time scheduling algorithm for reconfigurable computing. [Citation Graph (, )][DBLP]
A New Routing Approach to Minimizing FPGA Reconfiguration Data. [Citation Graph (, )][DBLP]
Fast On-line Task Placement and Scheduling on Reconfigurable Devices. [Citation Graph (, )][DBLP]
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