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Gregory Malecha: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author


  1. Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. [Citation Graph (, )][DBLP]


  2. Static consistency checking for verilog wire interconnects: using dependent types to check the sanity of verilog descriptions. [Citation Graph (, )][DBLP]


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