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Steven S. Lumetta: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sun-il Kim, Steven S. Lumetta
    Capacity-Efficient Protection with Fast Recovery in Optically Transparent Mesh Networks. [Citation Graph (0, 0)][DBLP]
    BROADNETS, 2004, pp:290-299 [Conf]
  2. Francesco Spadini, Brian Fahs, Sanjay J. Patel, Steven S. Lumetta
    Improving Quasi-Dynamic Schedules through Region Slip. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:149-158 [Conf]
  3. Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steven S. Lumetta
    Continuous Optimization. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:86-97 [Conf]
  4. Changhee Joo, Saewoong Bahk, Steven S. Lumetta
    Hybrid Active Queue Management. [Citation Graph (0, 0)][DBLP]
    ISCC, 2003, pp:999-1004 [Conf]
  5. Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher
    X-Tolerant Signature Analysis. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:432-441 [Conf]
  6. Brian Fahs, Satarupa Bose, Matthew M. Crum, Brian Slechta, Francesco Spadini, Tony Tung, Sanjay J. Patel, Steven S. Lumetta
    Performance characterization of a hardware mechanism for dynamic optimization. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:16-27 [Conf]
  7. Janak H. Patel, Steven S. Lumetta, Sudhakar M. Reddy
    Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:107-112 [Conf]
  8. Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil
    X-Tolerant Test Response Compaction. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:6, pp:566-574 [Journal]
  9. Wen-mei W. Hwu, Shane Ryoo, Sain-zee Ueng, John H. Kelm, Isaac Gelado, Sam S. Stone, Robert E. Kidd, Sara S. Baghsorkhi, Aqeel Mahesri, Stephanie C. Tsao, Nacho Navarro, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel
    Implicitly Parallel Programming Models for Thousand-Core Microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:754-759 [Conf]

  10. CIGAR: Application Partitioning for a CPU/Coprocessor Architecture. [Citation Graph (, )][DBLP]

  11. A Task-Centric Memory Model for Scalable Accelerator Architectures. [Citation Graph (, )][DBLP]

  12. Resource dimensioning in WDM networks under state-based routing schemes. [Citation Graph (, )][DBLP]

  13. Reduced flow routing: Leveraging residual capacity to reduce blocking in GMPLS networks. [Citation Graph (, )][DBLP]

  14. HybridOS: runtime support for reconfigurable accelerators. [Citation Graph (, )][DBLP]

  15. CUBA: an architecture for efficient CPU/co-processor data communication. [Citation Graph (, )][DBLP]

  16. Rigel: an architecture and scalable programming interface for a 1000-core accelerator. [Citation Graph (, )][DBLP]

  17. Cohesion: a hybrid memory model for accelerators. [Citation Graph (, )][DBLP]

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