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Deng Pan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Deng Pan, Yuanyuan Yang
    Bandwidth guaranteed multicast scheduling for virtual output queued packet switches. [Citation Graph (0, 0)][DBLP]
    BROADNETS, 2005, pp:981-990 [Conf]
  2. Deng Pan, Yuanyuan Yang
    Hardware Efficient Two Step Iterative Matching Algorithms for VOQ Switches. [Citation Graph (0, 0)][DBLP]
    ICPADS (1), 2006, pp:431-438 [Conf]
  3. Deng Pan, Yuanyuan Yang
    FIFO Based Multicast Scheduling Algorithm for VOQ Packet Switches. [Citation Graph (0, 0)][DBLP]
    ICPP, 2004, pp:318-325 [Conf]
  4. Deng Pan, Yuanyuan Yang
    Credit based fair scheduling for packet switched networks. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2005, pp:843-854 [Conf]
  5. Deng Pan, Yuanyuan Yang
    Pipelined two step iterative matching algorithms for CIOQ crossbar switches. [Citation Graph (0, 0)][DBLP]
    ANCS, 2005, pp:41-50 [Conf]
  6. Deng Pan, Yuanyuan Yang
    Localized asynchronous packet scheduling for buffered crossbar switches. [Citation Graph (0, 0)][DBLP]
    ANCS, 2006, pp:153-162 [Conf]
  7. Deng Pan, Yuanyuan Yang
    FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1283-1297 [Journal]
  8. Deng Pan, Yuanyuan Yang
    Max-Min Fair Bandwidth Allocation Algorithms for Packet Switches. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-10 [Conf]

  9. A Holistic View of Evolutionary Rates in Paralogous and Orthologous Genes. [Citation Graph (, )][DBLP]

  10. Providing flow based performance guarantees for buffered crossbar switches. [Citation Graph (, )][DBLP]

  11. Providing Performance Guarantees for Buffered Crossbar Switches without Speedup. [Citation Graph (, )][DBLP]

  12. COCONET: Co-operative Cache Driven Overlay NETwork for p2p Vod Streaming. [Citation Graph (, )][DBLP]

  13. Fair Queueing Based Packet Scheduling for Buffered Crossbar Switches. [Citation Graph (, )][DBLP]

  14. Packet-Mode Asynchronous Scheduling Algorithm for Partially Buffered Crossbar Switches. [Citation Graph (, )][DBLP]

  15. Buffer Management Algorithm Design and Implementation Based on Network Processors [Citation Graph (, )][DBLP]

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