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Gerhard Schellhorn: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    Proving System Correctness with KIV 3.0. [Citation Graph (0, 0)][DBLP]
    CADE, 1997, pp:69-72 [Conf]
  2. Wolfgang Reif, Gerhard Schellhorn, Andreas Thums
    Flaw Detection in Formal Specifications. [Citation Graph (0, 0)][DBLP]
    IJCAR, 2001, pp:642-657 [Conf]
  3. Andreas Thums, Gerhard Schellhorn, Frank Ortmeier, Wolfgang Reif
    Interactive Verification of Statecharts. [Citation Graph (0, 0)][DBLP]
    SoftSpez Final Report, 2004, pp:355-373 [Conf]
  4. Frank Ortmeier, Wolfgang Reif, Gerhard Schellhorn
    Introduction to Subject Area "Verification". [Citation Graph (0, 0)][DBLP]
    SoftSpez Final Report, 2004, pp:419-422 [Conf]
  5. Frank Ortmeier, Andreas Thums, Gerhard Schellhorn, Wolfgang Reif
    Combining Formal Methods and Safety Analysis - The ForMoSA Approach. [Citation Graph (0, 0)][DBLP]
    SoftSpez Final Report, 2004, pp:474-493 [Conf]
  6. Frank Ortmeier, Wolfgang Reif, Gerhard Schellhorn
    Formal Safety Analysis of a Radio-Based Railroad Crossing Using Deductive Cause-Consequence Analysis (DCCA). [Citation Graph (0, 0)][DBLP]
    EDCC, 2005, pp:210-224 [Conf]
  7. Gerhard Schellhorn, Wolfgang Reif, Axel Schairer, Paul A. Karger, Vernon Austel, David C. Toll
    Verification of a Formal Security Model for Multiapplicative Smart Cards. [Citation Graph (0, 0)][DBLP]
    ESORICS, 2000, pp:17-36 [Conf]
  8. Michael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel, Andreas Thums
    Formal System Development with KIV. [Citation Graph (0, 0)][DBLP]
    FASE, 2000, pp:363-366 [Conf]
  9. Michael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    KIV 3.0 for Provably Correct Systems. [Citation Graph (0, 0)][DBLP]
    FM-Trends, 1998, pp:330-337 [Conf]
  10. Dieter Hutter, Heiko Mantel, Georg Rock, Werner Stephan, Andreas Wolpers, Michael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    VSE: Controlling the Complexity in Formal Software Developments. [Citation Graph (0, 0)][DBLP]
    FM-Trends, 1998, pp:351-358 [Conf]
  11. Gerhard Schellhorn, Holger Grandy, Dominik Haneberg, Wolfgang Reif
    The Mondex Challenge: Machine Checked Proofs for an Electronic Purse. [Citation Graph (0, 0)][DBLP]
    FM, 2006, pp:16-31 [Conf]
  12. Andreas Thums, Gerhard Schellhorn
    Model Checking FTA. [Citation Graph (0, 0)][DBLP]
    FME, 2003, pp:739-757 [Conf]
  13. Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer
    Do You Trust Your Model Checker? [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:179-196 [Conf]
  14. Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    Formal Specification and Verification Using KIV. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1994, pp:787-787 [Conf]
  15. Wolfgang Reif, Frank Ortmeier, Andreas Thums, Gerhard Schellhorn
    Integrated formal methods for safety analysis of train systems. [Citation Graph (0, 0)][DBLP]
    IFIP Congress Topical Sessions, 2004, pp:637-642 [Conf]
  16. Thomas Fuchß, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    Three Selected Case Studies in Verification. [Citation Graph (0, 0)][DBLP]
    KORSO Book, 1995, pp:371-387 [Conf]
  17. Gerhard Schellhorn, Axel Burandt
    KIV. [Citation Graph (0, 0)][DBLP]
    Formal Development of Reactive Systems, 1995, pp:229-245 [Conf]
  18. Frank Ortmeier, Gerhard Schellhorn, Andreas Thums, Wolfgang Reif, Bernhard Hering, Helmut Trappschuh
    Safety Analysis of the Height Control System for the Elbtunnel. [Citation Graph (0, 0)][DBLP]
    SAFECOMP, 2002, pp:296-308 [Conf]
  19. Rainer Drexler, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel, Werner Stephan, Andreas Wolpers
    The KIV System: A Tool for Formal Program Development. [Citation Graph (0, 0)][DBLP]
    STACS, 1993, pp:704-705 [Conf]
  20. Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    Proving System Correctness with KIV. [Citation Graph (0, 0)][DBLP]
    TAPSOFT, 1997, pp:859-862 [Conf]
  21. Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel
    Tactics in KIV. [Citation Graph (0, 0)][DBLP]
    Elektronische Informationsverarbeitung und Kybernetik, 1994, v:30, n:5/6, pp:293-310 [Journal]
  22. Gerhard Schellhorn, Wolfgang Reif, Axel Schairer, Paul A. Karger, Vernon Austel, David C. Toll
    Verified Formal Security Models for Multiapplicative Smart Cards. [Citation Graph (0, 0)][DBLP]
    Journal of Computer Security, 2002, v:10, n:4, pp:339-368 [Journal]
  23. Rudolf Berghammer, Dominik Haneberg, Wolfgang Reif, Gerhard Schellhorn
    Special Issue on Tools for System Design and Verification. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2003, v:9, n:2, pp:86-87 [Journal]
  24. Wolfgang Reif, Gerhard Schellhorn
    J.UCS Special Issue on Tools for System Design and Verification - Part 1. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:1, pp:1-2 [Journal]
  25. Wolfgang Reif, Gerhard Schellhorn
    J.UCS Special Issue on Tools for System Design and Verification - Part 2. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:2, pp:105-106 [Journal]
  26. Wolfgang Reif, Gerhard Schellhorn, Tobias Vollmer, Jürgen Ruf
    Correctness of Efficient Real-Time Model Checking. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:2, pp:194-209 [Journal]
  27. Gerhard Schellhorn
    Verification of ASM Refinements Using Generalized Forward Simulation. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2001, v:7, n:11, pp:952-979 [Journal]
  28. Gerhard Schellhorn, Wolfgang Ahrendt
    Reasoning about Abstract State Machines: The WAM Case Study. [Citation Graph (0, 0)][DBLP]
    J. UCS, 1997, v:3, n:4, pp:377-413 [Journal]
  29. Michael Balser, Christoph Duelli, Wolfgang Reif, Gerhard Schellhorn
    Verifying Concurrent Systems with Symbolic Execution. [Citation Graph (0, 0)][DBLP]
    J. Log. Comput., 2002, v:12, n:4, pp:549-560 [Journal]
  30. Gerhard Schellhorn
    ASM refinement and generalizations of forward simulation in data refinement: a comparison. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2005, v:336, n:2-3, pp:403-435 [Journal]
  31. Dominik Haneberg, Holger Grandy, Wolfgang Reif, Gerhard Schellhorn
    Verifying Security Protocols: An ASM Approach. [Citation Graph (0, 0)][DBLP]
    Abstract State Machines, 2005, pp:247-262 [Conf]
  32. Gerhard Schellhorn
    ASMs and Refinement of State-based Systems. [Citation Graph (0, 0)][DBLP]
    Abstract State Machines, 2005, pp:74-75 [Conf]
  33. John Derrick, Gerhard Schellhorn, Heike Wehrheim
    Proving Linearizability Via Non-atomic Refinement. [Citation Graph (0, 0)][DBLP]
    IFM, 2007, pp:195-214 [Conf]
  34. Dominik Haneberg, Holger Grandy, Wolfgang Reif, Gerhard Schellhorn
    Verifying Smart Card Applications: An ASM Approach. [Citation Graph (0, 0)][DBLP]
    IFM, 2007, pp:313-332 [Conf]
  35. Frank Ortmeier, Gerhard Schellhorn
    Formal Fault Tree Analysis - Practical Experiences. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:185, n:, pp:139-151 [Journal]

  36. Formal Verification of Lock-Free Algorithms. [Citation Graph (, )][DBLP]


  37. A Concept-Driven Construction of the Mondex Protocol Using Three Refinements. [Citation Graph (, )][DBLP]


  38. Refinement of State-Based Systems: ASMs and Big Commuting Diagrams (Abstract). [Citation Graph (, )][DBLP]


  39. Automating Algebraic Specifications of Non-freely Generated Data Types. [Citation Graph (, )][DBLP]


  40. A Systematic Verification Approach for Mondex Electronic Purses Using ASMs. [Citation Graph (, )][DBLP]


  41. Verification of Mondex Electronic Purses with KIV: From a Security Protocol to Verified Code. [Citation Graph (, )][DBLP]


  42. Abstract Specification of the UBIFS File System for Flash Memory. [Citation Graph (, )][DBLP]


  43. Mechanizing a Correctness Proof for a Lock-Free Concurrent Stack. [Citation Graph (, )][DBLP]


  44. Interactive Verification of Concurrent Systems using Symbolic Execution. [Citation Graph (, )][DBLP]


  45. Temporal Logic Verification of Lock-Freedom. [Citation Graph (, )][DBLP]


  46. A Modeling Framework for the Development of Provably Secure E-Commerce Applications. [Citation Graph (, )][DBLP]


  47. Bounded Relational Analysis of Free Data Types. [Citation Graph (, )][DBLP]


  48. Interactive verification of concurrent systems using symbolic execution. [Citation Graph (, )][DBLP]


  49. On the Refinement of Atomic Actions. [Citation Graph (, )][DBLP]


  50. Completeness of ASM Refinement. [Citation Graph (, )][DBLP]


  51. Preface. [Citation Graph (, )][DBLP]


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