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Kim M. Hazelwood: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kim M. Hazelwood, Michael D. Smith
    Code Cache Management Schemes for Dynamic Optimizers. [Citation Graph (0, 0)][DBLP]
    Interaction between Compilers and Computer Architectures, 2002, pp:102-110 [Conf]
  2. Kim M. Hazelwood, Thomas M. Conte
    A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:71-80 [Conf]
  3. Kim M. Hazelwood, Artur Klauser
    A dynamic binary instrumentation engine for the ARM architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:261-270 [Conf]
  4. Steven Wallace, Kim M. Hazelwood
    SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:209-220 [Conf]
  5. Kim M. Hazelwood, Robert S. Cohn
    A Cross-Architectural Interface for Code Cache Manipulation. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:17-27 [Conf]
  6. Kim M. Hazelwood, David Grove
    Adaptive Online Context-Sensitive Inlining. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:253-264 [Conf]
  7. Kim M. Hazelwood, James E. Smith
    Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems. [Citation Graph (0, 0)][DBLP]
    CGO, 2004, pp:89-99 [Conf]
  8. Kim M. Hazelwood, David Brooks
    Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:326-331 [Conf]
  9. Kim M. Hazelwood, Michael D. Smith
    Generational Cache Management of Code Traces in Dynamic Optimization Systems. [Citation Graph (0, 0)][DBLP]
    MICRO, 2003, pp:169-179 [Conf]
  10. David Hiniker, Kim M. Hazelwood, Michael D. Smith
    Improving Region Selection in Dynamic Optimization Systems. [Citation Graph (0, 0)][DBLP]
    MICRO, 2005, pp:141-154 [Conf]
  11. Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood
    Pin: building customized program analysis tools with dynamic instrumentation. [Citation Graph (0, 0)][DBLP]
    PLDI, 2005, pp:190-200 [Conf]
  12. Kim M. Hazelwood, Michael D. Smith
    Managing bounded code caches in dynamic binary optimization systems. [Citation Graph (0, 0)][DBLP]
    TACO, 2006, v:3, n:3, pp:263-294 [Journal]
  13. Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
    Reducing Exit Stub Memory Consumption in Code Caches. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2007, pp:87-101 [Conf]
  14. Apala Guha, Jason Hiser, Naveen Kumar, Jing Yang, Min Zhao, Shukang Zhou, Bruce R. Childers, Jack W. Davidson, Kim M. Hazelwood, Mary Lou Soffa
    Virtual Execution Environments: Support and Tools. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]

  15. Dynamic program analysis of Microsoft Windows applications. [Citation Graph (, )][DBLP]


  16. Scalable support for multithreaded applications on dynamic binary instrumentation systems. [Citation Graph (, )][DBLP]


  17. Trace fragment selection within method-based JVMs. [Citation Graph (, )][DBLP]


  18. DBT path selection for holistic memory efficiency and performance. [Citation Graph (, )][DBLP]


  19. Evaluating the impact of dynamic binary translation systems on hardware cache performance. [Citation Graph (, )][DBLP]


  20. Analyzing Parallel Programs with Pin. [Citation Graph (, )][DBLP]


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