The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Daniel A. Connors: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ravikrishnan Sree, Alex Settle, Ian Bratt, Daniel A. Connors
    Compiler-Directed Resource Management for Active Code Regions. [Citation Graph (0, 0)][DBLP]
    Interaction between Compilers and Computer Architectures, 2003, pp:85-94 [Conf]
  2. Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors
    Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:91-0 [Conf]
  3. Alex Settle, Joshua L. Kihm, Andrew Janiszewski, Daniel A. Connors
    Architectural Support for Enhanced SMT Job Scheduling. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2004, pp:63-73 [Conf]
  4. S. P. Muszala, Gita Alaghband, Daniel A. Connors, James J. Hack
    A VFSA Scheduler for Radiative Transfer Data in Climate Models. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2004, pp:64-71 [Conf]
  5. Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Daniel A. Connors
    Code coverage testing using hardware performance monitoring support. [Citation Graph (0, 0)][DBLP]
    AADEBUG, 2005, pp:159-163 [Conf]
  6. Daniel A. Connors, Hillery C. Hunter, Ben-Chung Cheng, Wen-mei W. Hwu
    Hardware Support for Dynamic Management of Compiler-Directed Computation Reuse. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2000, pp:222-233 [Conf]
  7. Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, David Hodgdon, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors
    Dynamic run-time architecture techniques for enabling continuous optimization. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:211-220 [Conf]
  8. Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ramesh Peri
    Identifying potential parallelism via loop-centric profiling. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2007, pp:143-152 [Conf]
  9. Alex Settle, Daniel A. Connors, Gerolf Hoflehner, Daniel M. Lavery
    Optimization for the Intel® Itanium ®Architectur Register Stack. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:115-124 [Conf]
  10. Andreas Hagen, Daniel A. Connors, Bryan L. Pellom
    The analysis and design of architecture systems for speech recognition on modern handheld-computing devices. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:65-70 [Conf]
  11. Daniel A. Connors, Jean-Michel Puiatti, David I. August, Kevin M. Crozier, Wen-mei W. Hwu
    An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:1301-1311 [Conf]
  12. David I. August, Daniel A. Connors, John C. Gyllenhaal, Wen-mei W. Hwu
    Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results. [Citation Graph (0, 0)][DBLP]
    HPCA, 1997, pp:84-93 [Conf]
  13. Joshua L. Kihm, Daniel A. Connors
    Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:326-331 [Conf]
  14. Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Daniel A. Connors
    Methods for Modeling Resource Contention on Simultaneous Multithreading Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:373-380 [Conf]
  15. Matthew Ouellette, Daniel A. Connors
    Analysis of Hardware Acceleration in Reconfigurable Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  16. David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu
    Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 1998, pp:227-237 [Conf]
  17. David I. August, John W. Sias, Jean-Michel Puiatti, Scott A. Mahlke, Daniel A. Connors, Kevin M. Crozier, Wen-mei W. Hwu
    The Program Decision Logic Approach to Predicated Execution. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:208-219 [Conf]
  18. Joshua L. Kihm, Daniel A. Connors
    Statistical Simulation of Multithreaded Architectures. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 2005, pp:67-74 [Conf]
  19. Daniel A. Connors, Wen-mei W. Hwu
    Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results. [Citation Graph (0, 0)][DBLP]
    MICRO, 1999, pp:158-169 [Conf]
  20. Ben-Chung Cheng, Daniel A. Connors, Wen-mei W. Hwu
    Compiler-Directed Early Load-Address Generation. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:138-147 [Conf]
  21. Neil Vachharajani, Matthew Iyer, Chinmay Ashok, Manish Vachharajani, David I. August, Daniel A. Connors
    Chip multi-processor scalability for single-threaded applications. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:4, pp:44-53 [Journal]
  22. Teresa L. Johnson, Daniel A. Connors, Matthew C. Merten, Wen-mei W. Hwu
    Run-Time Cache Bypassing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:12, pp:1338-1354 [Journal]
  23. Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Joseph Blomstedt, Daniel A. Connors
    Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance. [Citation Graph (0, 0)][DBLP]
    DSN, 2007, pp:297-306 [Conf]

  24. Modeling Ion Channel Kinetics with HPC. [Citation Graph (, )][DBLP]


  25. Improved stride prefetching using extrinsic stream characteristics. [Citation Graph (, )][DBLP]


  26. Phase-Guided Small-Sample Simulation. [Citation Graph (, )][DBLP]


  27. Optimizing consistency checking for memory-intensive transactions. [Citation Graph (, )][DBLP]


  28. An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002