The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Israel Koren: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Cool-Fetch: A Compiler-Enabled IPC Estimation Based Framework for Energy Reduction. [Citation Graph (0, 0)][DBLP]
    Interaction between Compilers and Computer Architectures, 2004, pp:43-52 [Conf]
  2. David H. Albonesi, Israel Koren
    Improving the Memory Bandwidth of Highly-Integrated, Wide-Issue, Microprocessor-Based Systems. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1997, pp:126-135 [Conf]
  3. Zhaojun Wo, Israel Koren
    Synthesis of Saturating Counters Using Traditional and Non-Traditional Basic Counters. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:114-121 [Conf]
  4. Israel Koren, Yaron Koren, Bejoy G. Oomman
    Saturating Counters: Application and Design Alternatives. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2003, pp:228-0 [Conf]
  5. Dhananjay S. Phatak, Israel Koren
    Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:22-29 [Conf]
  6. Luca Breveglieri, Israel Koren, Paolo Maistri
    Detecting Faults in Four Symmetric Key Block Ciphers. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:258-268 [Conf]
  7. Zhan Chen, Israel Koren
    Techniques for Yield Enhancement of VLSI Adders. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:222-229 [Conf]
  8. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:303-0 [Conf]
  9. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:423-432 [Conf]
  10. Zhaojun Wo, Israel Koren
    Effective analytical delay model for transistor sizing. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:387-392 [Conf]
  11. A. Goel, C. Mani Krishna, Israel Koren
    Energy aware kernel for hard real-time systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:185-190 [Conf]
  12. Saurabh Chheda, Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Combining compiler and runtime IPC predictions to reduce energy in next generation architectures. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:240-254 [Conf]
  13. Shmuel Wimer, Israel Koren, Israel Cederbaum
    Optimal Aspect Ratios of Building Blocks in VLSI. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:66-72 [Conf]
  14. Luca Breveglieri, Israel Koren, Paolo Maistri
    Incorporating Error Detection and Online Reconfiguration into a Regular Architecture for the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:72-80 [Conf]
  15. Glenn H. Chapman, Israel Koren, Zahava Koren, Jozsef Dudas, Cory Jung
    On-Line Identification of Faults in Fault-Tolerant Imagers. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:149-157 [Conf]
  16. Zhan Chen, Israel Koren
    A Yield Study of VLSI Adders. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:239-245 [Conf]
  17. Zhan Chen, Israel Koren
    Crosstalk Minimization in Three-Layer HVH Channel Routing. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:38-43 [Conf]
  18. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri
    An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:130-138 [Conf]
  19. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:51-59 [Conf]
  20. Venkat K. R. Chiluvuri, Israel Koren
    Topological Optimization of PLAs for Yield Enhancement. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:175-182 [Conf]
  21. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:105-0 [Conf]
  22. Venkat K. R. Chiluvuri, Israel Koren, Jeffrey L. Burns
    The Effect of Wire Length Minimization on Yield. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:97-105 [Conf]
  23. Zahava Koren, Israel Koren
    Does the Floorplan of a Chip Affect Its Yield? [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:159-166 [Conf]
  24. Israel Koren, Zahava Koren
    Analysis of a Hybrid Defect-Tolerance Scheme for High-Density Memory ICs. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:166-174 [Conf]
  25. Israel Koren, Zahava Koren
    Yield and Routing Objectives in Floorplanning. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:28-36 [Conf]
  26. Israel Koren, Zahava Koren, Glenn H. Chapman
    A Self-Correcting Active Pixel Camera. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:56-0 [Conf]
  27. Israel Koren, Zahava Koren, Glenn H. Chapman
    Advanced Fault-Tolerance Techniques for a Color Digital Camera-on-a-Chip. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:3-10 [Conf]
  28. Atul Maheshwari, Israel Koren, Wayne Burleson
    Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:597-0 [Conf]
  29. Rajnish K. Prasad, Israel Koren
    The Effect of Placement on Yield for Standard Cell Designs. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:3-11 [Conf]
  30. Mandeep Singh, Israel Koren
    Reliability Enhancement of Analog-to-Digital Converters (ADCs). [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:347-0 [Conf]
  31. Arunshankar Venkataraman, Israel Koren
    Determination of Yield Bounds Prior to Routing. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:4-13 [Conf]
  32. Israel A. Wagner, Israel Koren
    An Interactive Yield Estimator as a VLSI CAD Tool. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:167-174 [Conf]
  33. Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
    An ILP Formulation for Yield-driven Architectural Synthesis. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:12-20 [Conf]
  34. Jozsef Dudas, Cory Jung, Linda Wu, Glenn H. Chapman, Israel Koren, Zahava Koren
    On-Line Mapping of In-Field Defects in Image Sensor Arrays. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:439-447 [Conf]
  35. Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
    Yield-aware Floorplanning. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:247-253 [Conf]
  36. Luca Breveglieri, Israel Koren
    Workshop on Fault Diagnosis and Tolerance in Cryptography. [Citation Graph (0, 0)][DBLP]
    DSN, 2004, pp:902- [Conf]
  37. Jayakrishnan Nair, Zahava Koren, Israel Koren, C. Mani Krishna
    Pre-Processing Input Data to Augment Fault Tolerance in Space Applications. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:491-500 [Conf]
  38. Vijay Lakamraju, Israel Koren, C. Mani Krishna
    Low Overhead Fault Tolerant Networking in Myrinet. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:193-0 [Conf]
  39. Diganta Roychowdhury, Israel Koren, C. Mani Krishna, Yann-Hang Lee
    A Voltage Scheduling Heuristic for Real-Time Task Graphs. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:741-750 [Conf]
  40. Luca Breveglieri, Israel Koren, Paolo Maistri, M. Ravasio
    Incorporating Error Detection in an RSA Architecture. [Citation Graph (0, 0)][DBLP]
    FDTC, 2006, pp:71-79 [Conf]
  41. Luca Breveglieri, Israel Koren, Paolo Maistri
    A Fault Attack Against the FOX Cipher Family. [Citation Graph (0, 0)][DBLP]
    FDTC, 2006, pp:98-105 [Conf]
  42. Aurobindo Dasgupta, Israel Koren
    An Algorithm for Area and Delay Optimization of Sequential Machines through Decomposition. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:36-45 [Conf]
  43. Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    The Minimax Cache: An Energy-Efficient Framework for Media Processors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2002, pp:131-140 [Conf]
  44. Balakrishnan Iyer, Ramesh Karri, Israel Koren
    Phantom redundancy: a high-level synthesis approach for manufacturability. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:658-661 [Conf]
  45. Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Energy Characterization of Hardware-Based Data Prefetching. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:518-523 [Conf]
  46. Dhananjay S. Phatak, Israel Koren, Hoon Choi
    Hybrid Number Representations with Bounded Carry Propagation Chains. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:272-275 [Conf]
  47. Israel Koren, Zahava Koren
    On the Bandwidth of a Multi-Stage Network in the Presence of Faulty Components. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1988, pp:26-32 [Conf]
  48. Yizheng Zhou, Vijay Lakamraju, Israel Koren, C. Mani Krishna
    Software-Based Adaptive and Concurrent Self-Testing in Programmable Network Interfaces. [Citation Graph (0, 0)][DBLP]
    ICPADS (1), 2006, pp:525-532 [Conf]
  49. Israel Koren, Gabriel M. Silberman
    A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach. [Citation Graph (0, 0)][DBLP]
    ICPP, 1983, pp:335-337 [Conf]
  50. Haim E. Mizrahi, Israel Koren
    Evaluating the Cost-Effectiveness of Switches in Processor Array Architectures. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:480-487 [Conf]
  51. Bilha Mendelson, Israel Koren
    Using Simulated Annealing for Mapping Algorithms onto Data Driven Arrays. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:123-127 [Conf]
  52. David H. Albonesi, Israel Koren
    Tradeoffs in the Design of Single Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IFIP PACT, 1994, pp:25-34 [Conf]
  53. Luca Breveglieri, Paolo Maistri, Israel Koren
    A Note on Error Detection in an RSA Architecture by Means of Residue Codes. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:176-177 [Conf]
  54. Zahava Koren, Israel Koren, C. Mani Krishna
    Surge Handling as a Measure of Real-Time System Dependability. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:1106-1116 [Conf]
  55. Zahava Koren, J. Rajagopal, C. Mani Krishna, Israel Koren, W. Wang, J. Loman
    Using Rational Approximations for Evaluating the Reliablity of Highly Reliable Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  56. Vijay Lakamraju, Zahava Koren, Israel Koren, C. Mani Krishna
    Measuring the Vulnerability of Interconnection Networks in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:919-924 [Conf]
  57. Steven Morin, Israel Koren, C. Mani Krishna
    JMPI: Implementing the Message Passing Standard in Java. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  58. Osman S. Unsal, Israel Koren, C. Mani Krishna
    Power-Aware Replication of Data Structures in Distributed Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:839-846 [Conf]
  59. Israel Koren
    A Reconfigurable and Fault-Tolerant VLSI Multiprocessor Array. [Citation Graph (0, 0)][DBLP]
    ISCA, 1981, pp:425-442 [Conf]
  60. Osman S. Unsal, Israel Koren, C. Mani Krishna
    Towards energy-aware software-based fault tolerance in real-time systems. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:124-129 [Conf]
  61. Zhaojun Wo, Israel Koren
    Technology Mapping for Reliability Enhancement in Logic Synthesis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:137-142 [Conf]
  62. Israel Koren
    Should Yield be a Design Objective? [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:115-120 [Conf]
  63. Israel Koren, Julie D. Segal
    Optimizing the Yield of VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:7- [Conf]
  64. Mandeep Singh, Israel Koren
    Incorporating Fault Tolerance in Analog-to-Digital Converters (ADCs). [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:286-291 [Conf]
  65. Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Cool-cache for hot multimedia. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:274-283 [Conf]
  66. Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Energy-Aware Data Prefetching for General-Purpose Programs. [Citation Graph (0, 0)][DBLP]
    PACS, 2004, pp:78-94 [Conf]
  67. E. Ciocca, Israel Koren, Zahava Koren, C. Mani Krishna, Daniel S. Katz
    Application-Level Fault Tolerance in the Orbital Thermal Imaging Spectrometer. [Citation Graph (0, 0)][DBLP]
    PRDC, 2004, pp:43-48 [Conf]
  68. Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
  69. Israel Koren, Bilha Mendelson, Irit Peled, Gabriel M. Silberman
    A Data-Driven VLSI Array for Arbitrary Algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1988, v:21, n:10, pp:30-43 [Journal]
  70. Israel Koren, Adit D. Singh
    Fault Tolerance in VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1990, v:23, n:7, pp:73-83 [Journal]
  71. Israel Cederbaum, Israel Koren, Shmuel Wimer
    Balanced Block Spacing for VLSI Layout. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 1992, v:40, n:3, pp:303-318 [Journal]
  72. Shmuel Wimer, Israel Koren, Israel Cederbaum
    On Paths with the Shortest Average Arc Length in Weighted Graphs. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 1993, v:45, n:2, pp:169-179 [Journal]
  73. Glenn H. Chapman, Sunjaya Djaja, Desmond Y. H. Cheung, Yves Audet, Israel Koren, Zahava Koren
    A Self-Correcting Active Pixel Sensor Using Hardware and Software Correction. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:6, pp:544-551 [Journal]
  74. Bilha Mendelson, Israel Koren
    Estimating the Potential Parallelism and Pipelining of Algorithms for Data Flow Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1992, v:14, n:1, pp:15-28 [Journal]
  75. Dipak Sitaram, Israel Koren, C. Mani Krishna
    A Random Distributed Algorithm to Embed Trees in Partially Faulty Processor Arrays. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1991, v:12, n:1, pp:1-11 [Journal]
  76. Paul Erdös, Israel Koren, Shlomo Moran, Gabriel M. Silberman, Shmuel Zaks
    Minimum-Diameter Cyclic Arrangements in Mapping Data-Flow Graphs onto VLSI Arrays. [Citation Graph (0, 0)][DBLP]
    Mathematical Systems Theory, 1988, v:21, n:2, pp:85-98 [Journal]
  77. Osman S. Unsal, Israel Koren
    System-level power-aware design techniques in real-time systems. [Citation Graph (0, 0)][DBLP]
    Proceedings of the IEEE, 2003, v:91, n:7, pp:1055-1069 [Journal]
  78. Menachem Berg, Israel Koren
    On Switching Policies for Modular Redundancy Fault-Tolerant Computing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:9, pp:1052-1062 [Journal]
  79. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:4, pp:492-505 [Journal]
  80. Luca Breveglieri, Israel Koren
    Guest Editors' Introduction: Special Section on Fault Diagnosis and Tolerance in Cryptography. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:9, pp:1073-1074 [Journal]
  81. Dan Gordon, Israel Koren, Gabriel M. Silberman
    Embedding Tree Stuctures in VLlSI Hexagonal Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:1, pp:104-107 [Journal]
  82. Michael Granski, Israel Koren, Gabriel M. Silberman
    The Effect of Operation Scheduling on the Performance of a Data Flow Computer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:9, pp:1019-1029 [Journal]
  83. Israel Koren
    Analysis of the Signal Reliability Measure and an Evaluation Procedure. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:3, pp:244-249 [Journal]
  84. Israel Koren
    Comments on ``The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:1, pp:93-94 [Journal]
  85. Israel Koren, Melvin A. Breuer
    On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:1, pp:21-27 [Journal]
  86. Israel Koren, Zahava Koren
    Incorporating Yield Enhancement into the Floorplanning Process. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:6, pp:532-541 [Journal]
  87. Israel Koren, Peter Kornerup
    Guest Editors' Introduction - Special Issue on Computer Arithmetic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:7, pp:625-627 [Journal]
  88. Israel Koren, Zvi Kohavi
    Sequential Fault Diagnosis in Combinational Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:4, pp:334-342 [Journal]
  89. Israel Koren, Zvi Kohavi
    Diagnosis of Intermittent Faults in Combinational Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:11, pp:1154-1158 [Journal]
  90. Israel Koren, Zvi Kohavi
    On the Properties of Sensitized Paths. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:3, pp:268-269 [Journal]
  91. Israel Koren, Zahava Koren
    Discrete and Continuous Models for the Performance of Reconfigurable Multistage Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:9, pp:1024-1033 [Journal]
  92. Israel Koren, Zahava Koren, Stephen Y. H. Su
    Analaysis of a Class of Recovery Procedures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:8, pp:703-712 [Journal]
  93. Israel Koren, Zahava Koren, Charles H. Stapper
    A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:724-734 [Journal]
  94. Israel Koren, Yoram Maliniak
    On Classes of Positive, Negative, and Imaginary Radix Number Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:5, pp:312-317 [Journal]
  95. Israel Koren, Dhiraj K. Pradhan
    Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:3, pp:344-355 [Journal]
  96. Israel Koren, Stephen Y. H. Su
    Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:7, pp:514-520 [Journal]
  97. Israel Koren, Eitan Sadeh
    A New Approach to the Evaluation of the Reliability of Digital Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:3, pp:261-267 [Journal]
  98. Israel Koren, Ofra Zinaty
    Evaluating Elementary Functions in a Numerical Coprocessor Based on Rational Approximations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:8, pp:1030-1037 [Journal]
  99. Régis Leveugle, Zahava Koren, Israel Koren, Gabriele Saucier, Norbert Wehn
    The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:12, pp:1398-1406 [Journal]
  100. Dhananjay S. Phatak, Tom Goff, Israel Koren
    Constant-Time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1267-1278 [Journal]
  101. Dhananjay S. Phatak, Israel Koren
    Hybrid Signed-Digit Number Systems: A Unified Framework for Redundant Number Representations With Bounded Carry Propagation Chains. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:8, pp:880-891 [Journal]
  102. Stephen Y. H. Su, Israel Koren, Yashwant K. Malaiya
    A Continous-Parameter Markov Model and Detection Procedures for Intermittent Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1978, v:27, n:6, pp:567-570 [Journal]
  103. Luca Breveglieri, Israel Koren, Paolo Maistri
    An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:5, pp:635-649 [Journal]
  104. Ramesh Karri, Balakrishnan Iyer, Israel Koren
    Phantom redundancy: a register transfer level technique for gracefully degradable data path synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:8, pp:877-888 [Journal]
  105. Shmuel Wimer, Israel Koren
    Analysis of strategies for constructive general block placement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:3, pp:371-377 [Journal]
  106. Shmuel Wimer, Israel Koren, Israel Cederbaum
    Optimal aspect ratios of building blocks in VLSI. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:2, pp:139-145 [Journal]
  107. Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
    Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2003, v:2, n:3, pp:373-392 [Journal]
  108. Joshua Haines, Vijay Lakamraju, Israel Koren, C. Mani Krishna
    Application-Level Fault Tolerance as a Complement to System-Level Fault Tolerance. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2000, v:16, n:1-2, pp:53-68 [Journal]
  109. Vijay Lakamraju, Israel Koren, C. Mani Krishna
    Filtering Random Graphs to Synthesize Interconnection Networks with Multiple Objectives. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:11, pp:1139-1149 [Journal]
  110. Yizheng Zhou, Vijay Lakamraju, Israel Koren, C. M. Krishna
    Software-Based Failure Detection and Recovery in Programmable Network Interfaces. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:11, pp:1539-1550 [Journal]
  111. Israel Koren, Zahava Koren, Charles H. Stapper
    A statistical study of defect maps of large area VLSI IC's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1994, v:2, n:2, pp:249-256 [Journal]
  112. Zahava Koren, Israel Koren
    On the effect of floorplanning on the yield of large area integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:1, pp:3-14 [Journal]
  113. Mandeep Singh, Israel Koren
    Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:5, pp:839-852 [Journal]
  114. Yongkui Han, Israel Koren, C. Mani Krishna
    TILTS: A Fast Architectural-Level Transient Thermal Simulation Method. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2007, v:3, n:1, pp:13-21 [Journal]

  115. An adaptive resource partitioning algorithm for SMT processors. [Citation Graph (, )][DBLP]


  116. Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. [Citation Graph (, )][DBLP]


  117. Quantitative Analysis of In-Field Defects in Image Sensor Arrays. [Citation Graph (, )][DBLP]


  118. Automatic Detection of In-field eld Defect Growth in Image Sensors. [Citation Graph (, )][DBLP]


  119. Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. [Citation Graph (, )][DBLP]


  120. Characterization of Gain Enhanced In-Field Defects in Digital Imagers. [Citation Graph (, )][DBLP]


  121. Countermeasures against Branch Target Buffer Attacks. [Citation Graph (, )][DBLP]


  122. Compiler-based adaptive fetch throttling for energy-efficiency. [Citation Graph (, )][DBLP]


  123. An Adaptive Algorithm for Fault Tolerant Re-Routing in Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  124. Statistical identification and analysis of defect development in digital imagers. [Citation Graph (, )][DBLP]


Search in 0.014secs, Finished in 0.620secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002