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Publications of Author

1. Youfeng Wu, Mauricio Breternitz Jr., Tevi Devor
   Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary Translato. [Citation Graph (0, 0)][DBLP]
   Interaction between Compilers and Computer Architectures, 2004, pp:3-12 [Conf]
   
2. Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar
   Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:135-0 [Conf]
   
3. Youfeng Wu, Mauricio Breternitz Jr., Justin Quek, Orna Etzion, Jesse Fang
   The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators. [Citation Graph (0, 0)][DBLP]
   CGO, 2004, pp:227-238 [Conf]
   
4. Youfeng Wu, Mauricio Breternitz Jr., Herbert H. J. Hum, Ramesh V. Peri, Jay Pickett
   Enhanced code density of embedded CISC processors with echo technology. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2005, pp:160-165 [Conf]
   
5. Tariq Afzal, Mauricio Breternitz Jr., M. Kacher, S. Menyhert, M. Ommerman, W. Su
   Motorola PowerPC Migration Tools - Emulation and Translation. [Citation Graph (0, 0)][DBLP]
   COMPCON, 1996, pp:145-150 [Conf]
   
6. Mauricio Breternitz Jr., John Paul Shen
   Architecture Synthesis of High-Performance Application-Specific Processors. [Citation Graph (0, 0)][DBLP]
   DAC, 1990, pp:542-548 [Conf]
   
7. Barbara Simons, Vivek Sarkar, Mauricio Breternitz Jr., Michael Lai
   An Optimal Asynchronous Scheduling Algorithm for Software Cache Consistence. [Citation Graph (0, 0)][DBLP]
   HICSS (2), 1994, pp:502-511 [Conf]
   
8. Mauricio Breternitz Jr., Roger Smith
   Enhanced Compression Techniques to Simplify Programm Decompression and Execution. [Citation Graph (0, 0)][DBLP]
   ICCD, 1997, pp:170-176 [Conf]
   
9. Mauricio Breternitz Jr., A. Manikonda, M. Ommerman, W. Su, A. Thornto
   Design Tradeoffs and Experience with Motorola PowerPC? Migration Tool. [Citation Graph (0, 0)][DBLP]
   ICCD, 1996, pp:301-0 [Conf]
   
10. Andrew Wolfe, Mauricio Breternitz Jr., Chriss Stephens, A. L. Ting, D. B. Kirk, Ronald P. Bianchini Jr., John Paul Shen
    The White Dwarf: A High-Performance Application-Specific Processor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1988, pp:212-222 [Conf]
    
11. Mauricio Breternitz Jr., John Paul Shen
    Organization of array data for concurrent memory access. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:97-99 [Conf]
    
12. Mauricio Breternitz Jr., John Paul Shen
    Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1991, pp:114-123 [Conf]
    
13. Cheng Wang, Shiliang Hu, Ho-Seop Kim, Sreekumar R. Nair, Mauricio Breternitz Jr., Zhiwei Ying, Youfeng Wu
    StarDBT: An Efficient Multi-platform Dynamic Binary Translation System. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2007, pp:4-15 [Conf]
    
14. 
    TAO: two-level atomicity for dynamic binary optimizations. [Citation Graph (, )][DBLP]
    
    
15. 
    Clustering-Based Microcode Compression. [Citation Graph (, )][DBLP]
    
    
16. 
    Impacts of Multiprocessor Configurations on Workloads in Bioinformatics. [Citation Graph (, )][DBLP]
    
    
17. 
    A Segmented Bloom Filter Algorithm for Efficient Predictors. [Citation Graph (, )][DBLP]