Search the dblp DataBase

Publications of Author

1. Jean-Pierre David, André Cogne, Annick Dutel
   Hypermedia Exercises Prototyping and Modelising. [Citation Graph (0, 0)][DBLP]
   CALISCE, 1996, pp:252-260 [Conf]
   
2. François Koeune, Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Pierre David, Jean-Didier Legat
   An FPGA Implementation of the Linear Cryptanalysis. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:845-852 [Conf]
   
3. Jean-Jacques Quisquater, François-Xavier Standaert, Gaël Rouvroy, Jean-Pierre David, Jean-Didier Legat
   A Cryptanalytic Time-Memory Tradeoff: First FPGA Implementation. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:780-789 [Conf]
   
4. Jean-Pierre David, Anne Lejeune, Emmanuelle Villiot-Leclercq
   Expressing Workshop Scenario with Computer Independent Model. [Citation Graph (0, 0)][DBLP]
   ICALT, 2006, pp:1168-1169 [Conf]
   
5. Christian Martel, Laurence Vignollet, Christine Ferraris, Jean-Pierre David, Anne Lejeune
   Modeling Collaborative Learning Activities on e-Learning Platforms. [Citation Graph (0, 0)][DBLP]
   ICALT, 2006, pp:707-709 [Conf]
   
6. Christian Martel, Laurence Vignollet, Christine Ferraris, Jean-Pierre David, Anne Lejeune
   LDL: An Alternative EML. [Citation Graph (0, 0)][DBLP]
   ICALT, 2006, pp:1107-1108 [Conf]
   
7. Laurence Vignollet, Jean-Pierre David, Christine Ferraris, Christian Martel, Anne Lejeune
   Comparing Educational Modeling Languages on a Case Study. [Citation Graph (0, 0)][DBLP]
   ICALT, 2006, pp:1149-1151 [Conf]
   
8. Emmanuelle Villiot-Leclercq, Jean-Pierre David, Anne Lejeune
   Expressing Learning Scenarios with Computer Independent Models. [Citation Graph (0, 0)][DBLP]
   ICALT, 2006, pp:520-522 [Conf]
   
9. Jean-Pierre David, Tony Postiau, Paul Fisette, Jean-Didier Legat
   Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2001, pp:143- [Conf]
   
10. Jean-Pierre David, Etienne Bergeron
    A Step towards Intelligent Translation from High-Level Design to RTL. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2004, pp:183-188 [Conf]
    
11. Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley, Jean-Pierre David
    High Level Synthesis for Data-Driven Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:54-60 [Conf]
    
12. Jean-Pierre David, Jean-Didier Legat
    A Data-Flow Oriented Co-Design for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:207-211 [Conf]
    
13. Jean-Pierre David, Kassem Kalach, Nicolas Tittley
    Hardware Complexity of Modular Multiplication and Exponentiation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:10, pp:1308-1319 [Journal]
    
14. 
    Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs. [Citation Graph (, )][DBLP]
    
    
15. 
    Towards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only). [Citation Graph (, )][DBLP]
    
    
16. 
    Setting up On-Line Learning Experiments: The LearningLab Platform. [Citation Graph (, )][DBLP]
    
    
17. 
    Application Specific Instruction set processor specialized for block motion estimation. [Citation Graph (, )][DBLP]
    
    
18. 
    An Intermediate Level HDL for System Level Design. [Citation Graph (, )][DBLP]
    
    
19. 
    A Scalable Architecture for Multivariate Polynomial Evaluation on FPGA. [Citation Graph (, )][DBLP]