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Publications of Author

1. Petros Oikonomakos, Jacques J. A. Fournier, Simon W. Moore
   Implementing Cryptography on TFT Technology for Secure Display Applications. [Citation Graph (0, 0)][DBLP]
   CARDIS, 2006, pp:32-47 [Conf]
   
2. George Economakos, Petros Oikonomakos, Ioannis Panagopoulos, Ioannis Poulakis, George K. Papakonstantinou
   Behavioral synthesis with systemC. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:21-25 [Conf]
   
3. Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-Hashimi
   Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:10596-10601 [Conf]
   
4. Petros Oikonomakos, Simon W. Moore
   An Asynchronous PLA with Improved Security Characteristics. [Citation Graph (0, 0)][DBLP]
   DSD, 2006, pp:257-264 [Conf]
   
5. Petros Oikonomakos, Mark Zwolinski
   Transformation Based Insertion of On-Line Testing Resources in a High-Level Synthesis Environment. [Citation Graph (0, 0)][DBLP]
   IOLTW, 2002, pp:185- [Conf]
   
6. Petros Oikonomakos, Mark Zwolinski
   Foundation of Combined Datapath and Controller Self-checking Design. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2003, pp:30-34 [Conf]
   
7. Petros Oikonomakos, Paul Fox
   Error Correction in Arithmetic Operations by I/O Inversion. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2006, pp:287-292 [Conf]
   
8. George Economakos, Petros Oikonomakos, Ioannis Poulakis, George K. Papakonstantinou, Stamatis Georgoulis
   Handling advanced scheduling heuristics under a hardware compiler generation environment. [Citation Graph (0, 0)][DBLP]
   Knowl.-Based Syst., 2002, v:15, n:1-2, pp:3-11 [Journal]
   
9. Petros Oikonomakos, Mark Zwolinski
   On the Design of Self-Checking Controllers with Datapath Interactions. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1423-1434 [Journal]
   
10. Petros Oikonomakos, Mark Zwolinski
    An Integrated High-Level On-Line Test Synthesis Tool. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2479-2491 [Journal]