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Oguz Ergin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin
Compiler Directed Early Register Release. [Citation Graph (0, 0)][DBLP]
IEEE PACT, 2005, pp:110-122 [Conf] - Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Reducing Datapath Energy through the Isolation of Short-Lived Operands. [Citation Graph (0, 0)][DBLP]
IEEE PACT, 2003, pp:258-268 [Conf] - Aneesh Aggarwal, Manoj Franklin, Oguz Ergin
Defining Wakeup Width for Efficient Dynamic Scheduling. [Citation Graph (0, 0)][DBLP]
ICCD, 2004, pp:36-41 [Conf] - Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose
Increasing Processor Performance Through Early Register Release. [Citation Graph (0, 0)][DBLP]
ICCD, 2004, pp:480-487 [Conf] - Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. [Citation Graph (0, 0)][DBLP]
ICCD, 2002, pp:118-121 [Conf] - Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
Distributed Reorder Buffer Schemes for Low Power. [Citation Graph (0, 0)][DBLP]
ICCD, 2003, pp:364-370 [Conf] - Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin
Power-Efficient Wakeup Tag Broadcast. [Citation Graph (0, 0)][DBLP]
ICCD, 2005, pp:654-661 [Conf] - Osman S. Unsal, Oguz Ergin, Xavier Vera, Antonio González
Empowering a helper cluster through data-width aware instruction selection policies. [Citation Graph (0, 0)][DBLP]
IPDPS, 2006, pp:- [Conf] - Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
Reducing reorder buffer complexity through selective operand caching. [Citation Graph (0, 0)][DBLP]
ISLPED, 2003, pp:235-240 [Conf] - Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Power efficient comparators for long arguments in superscalar processors. [Citation Graph (0, 0)][DBLP]
ISLPED, 2003, pp:378-383 [Conf] - Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
Instruction packing: reducing power and delay of the dynamic scheduling logic. [Citation Graph (0, 0)][DBLP]
ISLPED, 2005, pp:30-35 [Conf] - Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. [Citation Graph (0, 0)][DBLP]
MICRO, 2004, pp:304-315 [Conf] - Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. [Citation Graph (0, 0)][DBLP]
PACS, 2004, pp:15-29 [Conf] - Oguz Ergin
Exploiting Narrow Values for Energy Efficiency in the Register Files of Superscalar Microprocessors. [Citation Graph (0, 0)][DBLP]
PATMOS, 2006, pp:477-485 [Conf] - Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
Energy Efficient Register Renaming. [Citation Graph (0, 0)][DBLP]
PATMOS, 2003, pp:219-228 [Conf] - Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
Instruction packing: Toward fast and energy-efficient instruction scheduling. [Citation Graph (0, 0)][DBLP]
TACO, 2006, v:3, n:2, pp:156-181 [Journal] - Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
Early Register Deallocation Mechanisms Using Checkpointed Register Files. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2006, v:55, n:9, pp:1153-1166 [Journal] - Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2004, v:53, n:6, pp:653-665 [Journal] - Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Isolating Short-Lived Operands for Energy Reduction. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2004, v:53, n:6, pp:697-709 [Journal] - Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
Energy Efficient Comparators for Superscalar Datapaths. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 2004, v:53, n:7, pp:892-904 [Journal] - Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González
Fuse: A Technique to Anticipate Failures due to Degradation in ALUs. [Citation Graph (0, 0)][DBLP]
IOLTS, 2007, pp:15-22 [Conf] - Osman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin
Impact of Parameter Variations on Circuits and Microarchitecture. [Citation Graph (0, 0)][DBLP]
IEEE Micro, 2006, v:26, n:6, pp:30-39 [Journal] - Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter M. Kogge
Energy-efficient issue queue design. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2003, v:11, n:5, pp:789-800 [Journal]
Exploiting Inactive Rename Slots for Detecting Soft Errors. [Citation Graph (, )][DBLP]
Complexity-Effective Rename Table Design for Rapid Speculation Recovery. [Citation Graph (, )][DBLP]
Reducing parity generation latency through input value aware circuits. [Citation Graph (, )][DBLP]
Using Tag-Match Comparators for Detecting Soft Errors. [Citation Graph (, )][DBLP]
Exploiting Narrow Values for Soft Error Tolerance. [Citation Graph (, )][DBLP]
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