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Stamatis Vassiliadis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Stamatis Vassiliadis, George Triantafyllos, Walid Kobrosly
    A Fuzzy Reasoning Database Question Answering System. [Citation Graph (1, 0)][DBLP]
    IEEE Trans. Knowl. Data Eng., 1994, v:6, n:6, pp:868-882 [Journal]
  2. Ben H. H. Juurlink, Stamatis Vassiliadis, Dmitri Tcheressiz, Harry A. G. Wijshoff
    Implementation and Evaluation of the Complex Streamed Instruction Set. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2001, pp:73-82 [Conf]
  3. Stamatis Vassiliadis
    Polymorphic Processors: How to Expose Arbitrary Hardware Functionality to Programmers. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2004, pp:239-0 [Conf]
  4. Elth Ogston, Stamatis Vassiliadis
    Matchmaking among minimal agents without a facilitator. [Citation Graph (0, 0)][DBLP]
    Agents, 2001, pp:608-615 [Conf]
  5. Sorin Cotofana, Casper Lageweg, Stamatis Vassiliadis
    On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2003, pp:245-252 [Conf]
  6. Humberto Calderon, Stamatis Vassiliadis
    Reconfigurable Fixed Point Dense and Sparse Matrix-Vector Multiply/Add Unit. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:311-316 [Conf]
  7. Casper Lageweg, Sorin Cotofana, Stamatis Vassiliadis
    Binary Multiplication based on Single Electron Tunneling. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:152-166 [Conf]
  8. Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis
    A Low-Power Carry Skip Adder with Fast Saturation. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:269-279 [Conf]
  9. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Performance Comparison of SIMD Implementations of the Discrete Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:393-398 [Conf]
  10. Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven
    Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor. [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:250-259 [Conf]
  11. Stamatis Vassiliadis, Leonel Sousa, Georgi Gaydadjiev
    The Midlifekicker Microarchitecture Evaluation Metric. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:92-100 [Conf]
  12. Jan-Willem van de Waerdt, Stamatis Vassiliadis
    Instruction Set Architecture Enhancements for Video Processing. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:146-153 [Conf]
  13. Elth Ogston, Stamatis Vassiliadis
    A peer-to-peer agent auction. [Citation Graph (0, 0)][DBLP]
    AAMAS, 2002, pp:151-159 [Conf]
  14. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:293-303 [Conf]
  15. Humberto Calderon, Stamatis Vassiliadis
    Reconfigurable universal SAD-multiplier array. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:72-76 [Conf]
  16. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Improving the memory behavior of vertical filtering in the discrete wavelet transform. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:253-260 [Conf]
  17. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Matrix register file and extended subwords: two techniques for embedded media processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:171-179 [Conf]
  18. Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha
    Efficient Hardware for Antialiasing Coverage Mask Generation. [Citation Graph (0, 0)][DBLP]
    Computer Graphics International, 2004, pp:257-264 [Conf]
  19. Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
    Improving SHA-2 Hardware Implementations. [Citation Graph (0, 0)][DBLP]
    CHES, 2006, pp:298-310 [Conf]
  20. C. John Glossner, Mayan Moudgill, Daniel Iancu, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael Samori, Tanuj Raja, Michael J. Schulte, Stamatis Vassiliadis
    Future wireless convergence platforms. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:7-12 [Conf]
  21. Carlo Galuzzi, Elena Moscu Panainte, Yana Yankova, Koen Bertels, Stamatis Vassiliadis
    Automatic selection of application-specific instruction-set extensions. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:160-165 [Conf]
  22. Elth Ogston, Stamatis Vassiliadis
    Local Distributed Agent Matchmaking. [Citation Graph (0, 0)][DBLP]
    CoopIS, 2001, pp:67-79 [Conf]
  23. Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha
    GRAAL - A Development Framework for Embedded Graphics Accelerators. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1366-1367 [Conf]
  24. Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers
    The Future of Flexible HW Platform Architectures Panel Discussion. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:634-0 [Conf]
  25. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Instruction Scheduling for Dynamic Hardware Configurations. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:100-105 [Conf]
  26. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Compiler-driven FPGA-area allocation for reconfigurable computing. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:369-374 [Conf]
  27. Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis
    A Static Low-Power, High-Performance 32-bit Carry Skip Adder. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:615-619 [Conf]
  28. Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
    Scene Management Models and Overlap Tests for Tile-Based Rendering. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:424-431 [Conf]
  29. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    Implementation of a Streaming Execution Unit. [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:156-165 [Conf]
  30. Sorin Cotofana, Ben H. H. Juurlink, Stamatis Vassiliadis
    Counter Based Superscalar Instruction Issuing. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1307-1315 [Conf]
  31. Sorin Cotofana, Stamatis Vassiliadis
    On the Design Complexity of the Issue Logic of Superscalar Machines. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10277-10284 [Conf]
  32. C. John Glossner, Stamatis Vassiliadis
    DELFT-JAVA Link Translation Buffer. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10221-0 [Conf]
  33. C. John Glossner, Stamatis Vassiliadis
    Delft-Java Dynamic Translation. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1057-1062 [Conf]
  34. E. A. Hakkennes, Stamatis Vassiliadis
    Hardwired Paeth Codec for Portable Network Graphics (PNG). [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:2318-2325 [Conf]
  35. Gerald G. Pechanek, Stamatis Vassiliadis
    The ManArray( Embedded Processor Architecture. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1348-1355 [Conf]
  36. Stamatis Vassiliadis, E. A. Hakkennes, J. S. S. M. Wong, Gerald G. Pechanek
    The Sum-Absolute-Difference Motion Estimation Accelerato. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:20559-20566 [Conf]
  37. Stamatis Vassiliadis, Ben H. H. Juurlink, Edwin Hakkennes
    Complex Streamed Instructions: Introduction and Initial Evaluatio. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1400-0 [Conf]
  38. Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana
    A Sum of Absolute Differences Implementation in FPGA Hardware. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2002, pp:183-188 [Conf]
  39. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    Performance Scalability of Multimedia Instruction Set Extensions. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:849-860 [Conf]
  40. Georgi Gaydadjiev, Stamatis Vassiliadis
    SCISM vs IA-64 Tagging: Differences/Code Density Effects. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:571-577 [Conf]
  41. C. John Glossner, Stamatis Vassiliadis
    The Delft-Java Engine: An Introduction. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:766-770 [Conf]
  42. Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis
    Visual Data Rectangular Memory. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:760-767 [Conf]
  43. Silvia M. Müller, Per Stenström, Mateo Valero, Stamatis Vassiliadis
    Parallel Computer Architecture. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2000, pp:537-538 [Conf]
  44. Gerald G. Pechanek, Stamatis Vassiliadis, Nikos Pitsianis
    ManArray Processor Interconnection Network: An Introduction. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:761-765 [Conf]
  45. Marian Stanca, Stamatis Vassiliadis, Sorin Cotofana, Henk Corporaal
    Hashed Addressed Caches for Embedded Pointer Based Codes (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2000, pp:965-968 [Conf]
  46. Dmitri Tcheressiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    Performance of the Complex Streamed Instruction Set on Image Processing Kernels. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2001, pp:678-686 [Conf]
  47. Stamatis Vassiliadis, Sorin Cotofana, Pyrrhos Stathis
    Vector ISA Extension for Sparse Matrix-Vector Multiplication. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:708-715 [Conf]
  48. Stamatis Vassiliadis, Francky Catthoor, Mateo Valero, Sorin Cotofana
    Topic 15+20: Multimedia and Embedded Systems. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2001, pp:651-652 [Conf]
  49. Stamatis Vassiliadis, Nikitas J. Dimopoulos, Jean-Francois Collard, Arndt Bode
    Topic Introduction. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:541-542 [Conf]
  50. Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis
    The MOLEN Processor Prototype. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:296-299 [Conf]
  51. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:261-0 [Conf]
  52. Yong Dou, Stamatis Vassiliadis, Georgi Kuzmanov, G. N. Gaydadjiev
    64-bit floating-point FPGA matrix multiplication. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:86-95 [Conf]
  53. Lotfi Mhamdi, Christopher Kachris, Stamatis Vassiliadis
    A reconfigurable hardware based embedded scheduler for buffered crossbar switches. [Citation Graph (0, 0)][DBLP]
    FPGA, 2006, pp:143-149 [Conf]
  54. Georgi Kuzmanov, Stamatis Vassiliadis
    Arbitrating Instructions in an pmu-Coded CCM. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:81-90 [Conf]
  55. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Compiling for the Molen Programming Paradigm. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:900-910 [Conf]
  56. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    The PowerPC Backend Molen Compiler. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:434-443 [Conf]
  57. Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers
    Field-Programmable Custom Computing Machines - A Taxonomy -. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:79-88 [Conf]
  58. Ioannis Sourdis, Dionisios N. Pnevmatikatos, Stephan Wong, Stamatis Vassiliadis
    A Reconfigurable Perfect-Hashing Scheme for Packet Inspection. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:644-647 [Conf]
  59. Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana
    The MOLEN rho-mu-Coded Processor. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:275-285 [Conf]
  60. Georgi Kuzmanov, Stamatis Vassiliadis
    Reconfigurable repetitive padding unit. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2002, pp:98-103 [Conf]
  61. Sorin Cotofana, Stamatis Vassiliadis
    Serial Binary Addition with Polynominally Bounded Weights. [Citation Graph (0, 0)][DBLP]
    ICANN, 1996, pp:741-746 [Conf]
  62. Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Mihai Sima, Petri Liuha
    Parallel Multiple-Symbol Variable-Length Decoding. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:126-131 [Conf]
  63. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:425-430 [Conf]
  64. Jan-Willem van de Waerdt, Stamatis Vassiliadis, Jean-Paul van Itegem, Hans Van Antwerpen
    The TM3270 Media-Processor Data Cache. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:334-341 [Conf]
  65. Gerald G. Pechanek, M. Stojancic, Stamatis Vassiliadis, C. John Glossner
    MFAST: a single chip highly parallel image processing architecture. [Citation Graph (0, 0)][DBLP]
    ICIP, 1995, pp:69-72 [Conf]
  66. Stephan Wong, Sorin Cotofana, Stamatis Vassiliadis
    Multimedia Enhanced General-Purpose Processors. [Citation Graph (0, 0)][DBLP]
    IEEE International Conference on Multimedia and Expo (III), 2000, pp:1493-1496 [Conf]
  67. Pyrrhos Stathis, Dmitry Cheresiz, Stamatis Vassiliadis, Ben H. H. Juurlink
    Sparse Matrix Transpose Unit. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  68. Pyrrhos Stathis, Stamatis Vassiliadis, Sorin Cotofana
    A Hierarchical Sparse Matrix Storage Format for Vector Processors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:61- [Conf]
  69. Douglas H. Summerville, José G. Delgado-Frias, Stamatis Vassiliadis
    A High Performance Pattern Associative Oblivious Router for Tree Topologies. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:541-545 [Conf]
  70. Ricardo Chaves, Georgi Kuzmanov, Stamatis Vassiliadis, Leonel Sousa
    Reconfigurable memory based AES co-processor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  71. Christopher Kachris, Stamatis Vassiliadis
    Analysis of a reconfigurable network processor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  72. Marius Padure, Sorin Cotofana, Stamatis Vassiliadis
    Design and experimental results of a CMOS flip-flop featuring embedded threshold logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:253-256 [Conf]
  73. Dan Crisu, Stamatis Vassiliadis, Sorin Cotofana, Petri Liuha
    Low cost and latency embedded 3D graphics reciprocation. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:905-908 [Conf]
  74. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File. [Citation Graph (0, 0)][DBLP]
    ISM, 2006, pp:37-46 [Conf]
  75. Peter Celinski, Said F. Al-Sarawi, Derek Abbott, Sorin Cotofana, Stamatis Vassiliadis
    Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:127-134 [Conf]
  76. Stephan Wong, Sorin Cotofana, Stamatis Vassiliadis
    General-Purpose Processor Huffman Encoding Extension. [Citation Graph (0, 0)][DBLP]
    ITCC, 2000, pp:158-163 [Conf]
  77. Marius Padure, Sorin Cotofana, Stamatis Vassiliadis
    CMOS Implementation of Generalized Threshold Functions. [Citation Graph (0, 0)][DBLP]
    IWANN (2), 2003, pp:65-72 [Conf]
  78. Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
    GraalBench: a 3D graphics benchmark suite for mobile phones. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:1-9 [Conf]
  79. Mayan Moudgill, Keshav Pingali, Stamatis Vassiliadis
    Register renaming and dynamic speculation: an alternative approach. [Citation Graph (0, 0)][DBLP]
    MICRO, 1993, pp:202-213 [Conf]
  80. Nadeem Malik, Richard J. Eickemeyer, Stamatis Vassiliadis
    Interlock collapsing ALU for increased instruction-level parallelism. [Citation Graph (0, 0)][DBLP]
    MICRO, 1992, pp:149-157 [Conf]
  81. Yiannakis Sazeides, Stamatis Vassiliadis, James E. Smith
    The Performance Potential of Data Dependence Speculation & Collapsing. [Citation Graph (0, 0)][DBLP]
    MICRO, 1996, pp:238-247 [Conf]
  82. Jan-Willem van de Waerdt, Stamatis Vassiliadis, Sanjeev Das, Sebastian Mirolo, Chris Yen, Bill Zhong, Carlos Basto, Jean-Paul van Itegem, Dinesh Amirtharaj, Kulbhushan Kalra, Pedro Rodriguez, Hans Van Antwerpen
    The TM3270 Media-Processor. [Citation Graph (0, 0)][DBLP]
    MICRO, 2005, pp:331-342 [Conf]
  83. Pyrrhos Stathis, Stamatis Vassiliadis, Sorin Cotofana
    D-SAB: A Sparse Matrix Benchmark Suite. [Citation Graph (0, 0)][DBLP]
    PaCT, 2003, pp:549-554 [Conf]
  84. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    Architectural Support for 3D Graphics in the Complex Streamed Instruction Set. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:531-536 [Conf]
  85. Valentine C. Aikens II, Steven M. Barber, José G. Delgado-Frias, Gerald G. Pechanek, Stamatis Vassiliadis
    A Neuro-Architecture with Embedded Learning. [Citation Graph (0, 0)][DBLP]
    Parallel and Distributed Computing and Systems, 1995, pp:103-106 [Conf]
  86. Christoforos Kachris, Stamatis Vassiliadis
    Performance Evaluation of an Adaptive FPGA for Network Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:54-62 [Conf]
  87. Ben H. H. Juurlink, Asadollah Shahbahrami, Stamatis Vassiliadis
    Avoiding data conversions in embedded media processors. [Citation Graph (0, 0)][DBLP]
    SAC, 2005, pp:901-902 [Conf]
  88. Elth Ogston, Stamatis Vassiliadis
    Unstructured agent matchmaking: experiments in timing and fuzzy matching. [Citation Graph (0, 0)][DBLP]
    SAC, 2002, pp:300-305 [Conf]
  89. Jan-Willem van de Waerdt, Gerrit A. Slavenburg, Jean-Paul van Itegem, Stamatis Vassiliadis
    Motion estimation performance of the TM3270 processor. [Citation Graph (0, 0)][DBLP]
    SAC, 2005, pp:850-856 [Conf]
  90. Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis
    A Low-Power Multithreaded Processor for Baseband Communication Systems. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:393-402 [Conf]
  91. Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
    Memory Bandwidth Requirements of Tile-Based Rendering. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:323-332 [Conf]
  92. Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis
    Loading rho-µ-Code: Design Considerations. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:11-19 [Conf]
  93. Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis
    The Virtex II ProTM MOLEN Processor. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:192-202 [Conf]
  94. Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven
    A 2D Addressing Mode for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:291-306 [Conf]
  95. Humberto Calderon, Stamatis Vassiliadis
    Reconfigurable Multiple Operation Array. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:22-31 [Conf]
  96. Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
    Rescheduling for Optimized SHA-1 Calculation. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2006, pp:425-434 [Conf]
  97. Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha
    High-Level Energy Estimation for ARM-Based SOCs. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:168-177 [Conf]
  98. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Dynamic Hardware Reconfigurations: Performance Impact for MPEG2. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:284-292 [Conf]
  99. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Interprocedural Optimization for Dynamic Hardware Configurations. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:2-11 [Conf]
  100. Georgi Gaydadjiev, Stamatis Vassiliadis
    Flux Caches: What Are They and Are They Useful? [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:93-102 [Conf]
  101. Georgi Gaydadjiev, Stamatis Vassiliadis
    SAD Prefetching for MPEG4 Using Flux Caches. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2006, pp:248-258 [Conf]
  102. C. John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael J. Schulte, Stamatis Vassiliadis
    Sandbridge Software Tools. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:269-278 [Conf]
  103. C. John Glossner, Michael J. Schulte, Stamatis Vassiliadis
    A Java-Enabled DSP. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:307-326 [Conf]
  104. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:224-241 [Conf]
  105. Stamatis Vassiliadis, Georgi Gaydadjiev, Koen Bertels, Elena Moscu Panainte
    The Molen Programming Paradigm. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:1-10 [Conf]
  106. Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana
    Microcoded Reconfigurable Embedded Processors: Current Developments. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:207-223 [Conf]
  107. J. Park, Brian W. O'Krafka, Stamatis Vassiliadis, José G. Delgado-Frias
    Design and evaluation of a DAMQ multiprocessor network with self-compacting buffers. [Citation Graph (0, 0)][DBLP]
    SC, 1994, pp:713-722 [Conf]
  108. Jan-Willem van de Waerdt, Stamatis Vassiliadis, Erwin B. Bellers, Johan Janssen
    Temporal video up-conversion on a next generation media-processor. [Citation Graph (0, 0)][DBLP]
    SIP, 2005, pp:434-441 [Conf]
  109. Casper Lageweg, Sorin Cotofana, Stamatis Vassiliadis
    Evaluation Methodology for Single Electron Encoded Threshold Logic Gates. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:258-262 [Conf]
  110. Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha
    FPGA-Based Variable Length Decoders. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:437-441 [Conf]
  111. Christoforos Kachris, Stamatis Vassiliadis
    Design of a web switch in a reconfigurable platform. [Citation Graph (0, 0)][DBLP]
    ANCS, 2006, pp:31-40 [Conf]
  112. Ioannis Sourdis, Vassilis Dimopoulos, Dionisios N. Pnevmatikatos, Stamatis Vassiliadis
    Packet pre-filtering for network intrusion detection. [Citation Graph (0, 0)][DBLP]
    ANCS, 2006, pp:183-192 [Conf]
  113. Koen Bertels, L. Neuberg, Stamatis Vassiliadis, D. G. Pechanek
    On Chaos and Neural Networks: The Backpropagation Paradigm. [Citation Graph (0, 0)][DBLP]
    Artif. Intell. Rev., 2001, v:15, n:3, pp:165-187 [Journal]
  114. Lotfi Mhamdi, Mounir Hamdi, Christopher Kachris, Stephan Wong, Stamatis Vassiliadis
    High-performance switching based on buffered crossbar fabrics. [Citation Graph (0, 0)][DBLP]
    Computer Networks, 2006, v:50, n:13, pp:2271-2285 [Journal]
  115. C. John Glossner, Jesse Thilo, Stamatis Vassiliadis
    Java signal processing: FFTs with bytecodes. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1998, v:10, n:11-13, pp:1173-1178 [Journal]
  116. Stamatis Vassiliadis, Michael Putrino, Eric M. Schwarz
    Parallel Encryted Array Multipliers. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 1988, v:32, n:4, pp:536-551 [Journal]
  117. Sorin Cotofana, Stamatis Vassiliadis
    Serial binary multiplication with feed-forward neural networks. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 1999, v:28, n:1-3, pp:1-19 [Journal]
  118. Asadollah Shahbahrami, Ben H. H. Juurlink, Demid Borodin, Stamatis Vassiliadis
    Avoiding Conversion and Rearrangement Overhead in SIMD Architectures. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2006, v:34, n:3, pp:237-260 [Journal]
  119. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    Implementation of a streaming execution unit. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:49, n:12-15, pp:599-617 [Journal]
  120. George Triantafyllos, Stamatis Vassiliadis, Walid Kobrosly
    Software metrics for the microcode of computer systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 1994, v:26, n:3, pp:221-232 [Journal]
  121. George Triantafyllos, Stamatis Vassiliadis, Walid Kobrosly
    On the prediction of computer implementation faults via static error prediction models. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 1995, v:28, n:2, pp:129-142 [Journal]
  122. Mayan Moudgill, Stamatis Vassiliadis
    Precise Interrupts. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 1996, v:16, n:1, pp:58-67 [Journal]
  123. Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana
    Microcode Processing: Positioning and Directions. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:4, pp:21-31 [Journal]
  124. Koen Bertels, L. Neuberg, Stamatis Vassiliadis, D. G. Pechanek
    Chaos and Neural Network Learning. Some Observations. [Citation Graph (0, 0)][DBLP]
    Neural Processing Letters, 1998, v:7, n:2, pp:69-80 [Journal]
  125. George Triantafyllos, Stamatis Vassiliadis
    Software Reliability Models for Computer Implementations - An Empirical Study. [Citation Graph (0, 0)][DBLP]
    Softw., Pract. Exper., 1996, v:26, n:2, pp:135-164 [Journal]
  126. Sorin Dan Cotofana, Casper Lageweg, Stamatis Vassiliadis
    Addition Related Arithmetic Operations via Controlled Transport of Charge. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:3, pp:243-256 [Journal]
  127. Sorin Cotofana, Stamatis Vassiliadis
    Signed Digit Addition and Related Operations with Threshold Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:3, pp:193-207 [Journal]
  128. James Phillips, Stamatis Vassiliadis
    High-Performance 3-1 Interlock Collapsing ALU's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:3, pp:257-268 [Journal]
  129. Stamatis Vassiliadis, Sorin Cotofana, Koen Bertels
    2-1 Additions and Related Arithmetic Operations with Threshold Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:9, pp:1062-1067 [Journal]
  130. Stamatis Vassiliadis, James Phillips, Bart Blaner
    Interlock Collapsing ALU's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:7, pp:825-839 [Journal]
  131. Stamatis Vassiliadis, Eric M. Schwarz, Don J. Hanrahan
    A General Proof for Overlapped Multiple-Bit Scanning Multiplications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:2, pp:172-183 [Journal]
  132. Stamatis Vassiliadis, Eric M. Schwarz, Baik Moon Sung
    Hard-Wired Multipliers with Encoded Partial Products. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:11, pp:1181-1197 [Journal]
  133. Stamatis Vassiliadis, Stephan Wong, Georgi Gaydadjiev, Koen Bertels, Georgi Kuzmanov, Elena Moscu Panainte
    The MOLEN Polymorphic Processor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:11, pp:1363-1375 [Journal]
  134. Ming Zhang, Stamatis Vassiliadis, José G. Delgado-Frias
    Sigmoid Generators for Neural Computing Using Piecewise Approximations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:9, pp:1045-1049 [Journal]
  135. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    The Molen compiler for reconfigurable processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:1, pp:- [Journal]
  136. Stamatis Vassiliadis, George Triantafyllos, Walid Kobrosly
    Establishing the Relevancy of the Bookkeeping Libraries to the Functional Testing of Computer Implementations. [Citation Graph (0, 4)][DBLP]
    IEEE Trans. Knowl. Data Eng., 1997, v:9, n:4, pp:646-652 [Journal]
  137. Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis
    Multimedia rectangularly addressable memory. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Multimedia, 2006, v:8, n:2, pp:315-322 [Journal]
  138. Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven
    Hardwired MPEG-4 repetitive padding. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Multimedia, 2005, v:7, n:2, pp:261-268 [Journal]
  139. Douglas H. Summerville, José G. Delgado-Frias, Stamatis Vassiliadis
    A Flexible Bit-Pattern Associative Router for Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:5, pp:477-485 [Journal]
  140. Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff
    The CSI multimedia architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:1, pp:1-13 [Journal]
  141. Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    Pel reconstruction on FPGA-augmented TriMedia. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:6, pp:622-635 [Journal]
  142. Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha
    Multiple-symbol parallel decoding for variable length codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:7, pp:676-685 [Journal]
  143. B. Pourebrahimi, Koen Bertels, G. M. Kandru, Stamatis Vassiliadis
    Market-Based Resource Allocation in Grids. [Citation Graph (0, 0)][DBLP]
    e-Science, 2006, pp:80- [Conf]
  144. Christoforos Kachris, Stamatis Vassiliadis
    A Dynamically Reconfigurable Queue Scheduler. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]
  145. Yana Yankova, Koen Bertels, Stamatis Vassiliadis, Roel Meeuws, Arcilio Virginia
    Automated HDL Generation: Comparative Evaluation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2750-2753 [Conf]
  146. Stamatis Vassiliadis, Ioannis Sourdis
    FLUX Networks: Interconnects on Demand. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2006, pp:160-167 [Conf]
  147. Demid Borodin, Ben H. H. Juurlink, Stamatis Vassiliadis
    Instruction-Level Fault Tolerance Configurability. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:110-117 [Conf]
  148. Humberto Calderon, Carlo Galuzzi, Georgi Gaydadjiev, Stamatis Vassiliadis
    High-Bandwidth Address Generation Unit. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:251-262 [Conf]
  149. Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis
    A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:283-293 [Conf]
  150. John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis
    Trends in Low Power Handset Software Defined Radio. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:313-321 [Conf]
  151. Christoforos Kachris, Stamatis Vassiliadis
    Design Space Exploration of Configuration Manager for Network Processing Applications. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:34-40 [Conf]
  152. João Bispo, Ioannis Sourdis, João M. P. Cardoso, Stamatis Vassiliadis
    Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:179-190 [Conf]
  153. Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis
    A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:130-141 [Conf]
  154. Jae Young Hur, Todor Stefanov, Stephan Wong, Stamatis Vassiliadis
    Systematic Customization of On-Chip Crossbar Interconnects. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:61-72 [Conf]
  155. Jae Young Hur, Stephan Wong, Stamatis Vassiliadis
    Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:49-60 [Conf]
  156. Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Wong, Elena Moscu Panainte, Georgi Gaydadjiev, Koen Bertels, Dmitry Cheresiz
    PISC: Polymorphic Instruction Set Computers. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:274-286 [Conf]
  157. Jarmo Takala, Timo D. Hämäläinen, Andy D. Pimentel, Stamatis Vassiliadis
    Editorial. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:8, pp:465- [Journal]
  158. Stamatis Vassiliadis, Ioannis Sourdis
    FLUX interconnection networks on demand. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:10, pp:777-793 [Journal]
  159. Timo D. Hämäläinen, Stephan Wong, John Glossner, Stamatis Vassiliadis
    Editorial. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:10, pp:677-678 [Journal]
  160. Michael Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis
    A Low-Power Multithreaded Processor for Software Defined Radio. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:143-159 [Journal]
  161. Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
    Interprocedural Compiler Optimization for Partial Run-Time Reconfiguration. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:161-172 [Journal]
  162. Andy D. Pimentel, Stamatis Vassiliadis
    Editorial. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:111- [Journal]

  163. A Dynamic Pricing and Bidding Strategy for Autonomous Agents in Grids. [Citation Graph (, )][DBLP]


  164. Customizing Reconfigurable On-Chip Crossbar Scheduler. [Citation Graph (, )][DBLP]


  165. SIMD Vectorization of Histogram Functions. [Citation Graph (, )][DBLP]


  166. Reconfigurable Universal Adder. [Citation Graph (, )][DBLP]


  167. Merged Computation for Whirlpool Hashing. [Citation Graph (, )][DBLP]


  168. A Load/Store Unit for a Memcpy Hardware Accelerator. [Citation Graph (, )][DBLP]


  169. HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation. [Citation Graph (, )][DBLP]


  170. DWARV: DelftWorkBench Automated Reconfigurable VHDL Generator. [Citation Graph (, )][DBLP]


  171. A Quantitative Prediction Model for Hardware/Software Partitioning. [Citation Graph (, )][DBLP]


  172. BRAM-LUT Tradeoff on a Polymorphic DES Design. [Citation Graph (, )][DBLP]


  173. Infrastructure for Cross-Layer Designs Interaction. [Citation Graph (, )][DBLP]


  174. Coarse Reconfigurable Multimedia Unit Extension. [Citation Graph (, )][DBLP]


  175. A reconfigurable platform for multi-service edge routers. [Citation Graph (, )][DBLP]


  176. Vectorized AES Core for High-throughput Secure Environments. [Citation Graph (, )][DBLP]


  177. GRAAL: A Framework for Low-Power 3D Graphics Accelerators. [Citation Graph (, )][DBLP]


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