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Mahmut T. Kandemir: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Matrix-Based Approach to the Global Locality Optimization Problem. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:306-313 [Conf]
  2. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:203-211 [Conf]
  3. Mahmut T. Kandemir, J. Ramanujam
    Data Relation Vectors: A New Abstraction for Data Optimizations. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:227-236 [Conf]
  4. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1997, pp:236-0 [Conf]
  5. Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
    Leakage Energy Management in Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:131-140 [Conf]
  6. Sri Hari Krishna Narayanan, Mahmut T. Kandemir, R. R. Brooks, Ibrahim Kolcu
    Secure Execution of Computations in Untrusted Hosts. [Citation Graph (0, 0)][DBLP]
    Ada-Europe, 2006, pp:106-118 [Conf]
  7. Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Reliability-Aware Co-Synthesis for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:41-50 [Conf]
  8. G. Chen, Mahmut T. Kandemir
    Optimizing embedded applications using programmer-inserted hints. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:157-160 [Conf]
  9. G. Chen, Mahmut T. Kandemir, Mary Jane Irwin, Gokhan Memik
    Compiler-directed selective data protection against soft errors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:713-716 [Conf]
  10. Guilin Chen, Mahmut T. Kandemir, Feihui Li
    Energy-aware computation duplication for improving reliability in embedded chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:134-139 [Conf]
  11. Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Object duplication for improving reliability. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:140-145 [Conf]
  12. Guangyu Chen, Feihui Li, Mahmut T. Kandemir, I. Demirkiran
    Increasing FPGA resilience against soft errors using task duplication. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:924-927 [Conf]
  13. John Conner, Yuan Xie, Mahmut T. Kandemir, Robert Dick, Greg M. Link
    FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:709-712 [Conf]
  14. N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary
    Strategies for Improving Data Locality in Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:631-638 [Conf]
  15. Victor M. DeLaLuz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu
    Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:288-296 [Conf]
  16. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen
    Studying interactions between prefetching and cache line turnoff. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:545-548 [Conf]
  17. Ismail Kadayif, Mahmut T. Kandemir, Feihui Li
    Prefetching-aware cache line turnoff for saving leakage energy. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:182-187 [Conf]
  18. Mahmut T. Kandemir, Guangyu Chen, Feihui Li
    Maximizing data reuse for minimizing memory space requirements and execution cycles. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:808-813 [Conf]
  19. Mahmut T. Kandemir, Guangyu Chen, Feihui Li, I. Demirkiran
    Using data replication to reduce communication energy on chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:769-772 [Conf]
  20. Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut T. Kandemir, Feihui Li
    Using loop invariants to fight soft errors in data caches. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1317-1320 [Conf]
  21. J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir
    A Heuristic for Clock Selection in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:414-419 [Conf]
  22. J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir
    Address Code and Arithmetic Optimizations for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:619-624 [Conf]
  23. Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Compiler-Guided data compression for reducing memory consumption of embedded applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:814-819 [Conf]
  24. Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy
    Customized on-chip memories for embedded chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:743-748 [Conf]
  25. Ozcan Ozturk, Feng Wang 0004, Mahmut T. Kandemir, Yuan Xie
    Optimal topology exploration for application-specific 3D architectures. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:390-395 [Conf]
  26. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, Feihui Li
    Energy savings through embedded processing on disk system. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:128-133 [Conf]
  27. Priya Unnikrishnan, Mahmut T. Kandemir, Feihui Li
    Reducing dynamic compilation overhead by overlapping compilation and execution. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:929-934 [Conf]
  28. Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin
    Compiler-directed proactive power management for networks. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:137-146 [Conf]
  29. Guangyu Chen, Mahmut T. Kandemir
    Verifiable annotations for embedded java environments. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:105-114 [Conf]
  30. Guilin Chen, Mahmut T. Kandemir, Hendra Saputra, Mary Jane Irwin
    Exploiting bank locality in multi-bank memories. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:287-297 [Conf]
  31. Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Energy-oriented compiler optimizations for partitioned memory architectures. [Citation Graph (0, 0)][DBLP]
    CASES, 2000, pp:138-147 [Conf]
  32. Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir
    Reducing energy consumption of queries in memory-resident database systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:35-45 [Conf]
  33. Mahmut T. Kandemir, Ismail Kadayif, Alok N. Choudhary, Joseph Zambreno
    Optimizing inter-nest data locality. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:127-135 [Conf]
  34. Mahmut T. Kandemir, Ozcan Ozturk, Mustafa Karaköy
    Dynamic on-chip memory management for chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:14-23 [Conf]
  35. Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Energy-efficient instruction cache using page-based placement. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:229-237 [Conf]
  36. Wei Zhang 0002, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
    Performance, energy, and reliability tradeoffs in replicating hot cache lines. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:309-317 [Conf]
  37. Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, J. Ramanujam
    Address Register Assignment for Reducing Code Size. [Citation Graph (0, 0)][DBLP]
    CC, 2003, pp:273-289 [Conf]
  38. Mahmut T. Kandemir, Ibrahim Kolcu, Ismail Kadayif
    Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:276-292 [Conf]
  39. Mahmut T. Kandemir
    Array Unification: A Locality Optimization Technique. [Citation Graph (0, 0)][DBLP]
    CC, 2001, pp:259-273 [Conf]
  40. Feihui Li, Guilin Chen, Mahmut T. Kandemir, R. R. Brooks
    A Compiler-Based Approach to Data Security. [Citation Graph (0, 0)][DBLP]
    CC, 2005, pp:188-203 [Conf]
  41. Murali Vilayannur, Anand Sivasubramaniam, Mahmut T. Kandemir, Rajeev Thakur, Robert B. Ross
    Discretionary Caching for I/O on Clusters. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2003, pp:96-103 [Conf]
  42. Seung Woo Son, Mahmut T. Kandemir
    Integrated Data Reorganization and Disk Mapping for Reducing Disk Energy Consumption. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2007, pp:557-564 [Conf]
  43. Suleyman Tosun, Mahmut T. Kandemir, Hakduran Koc
    Using Task Recomputation During Application Mapping in Parallel Embedded Architectures. [Citation Graph (0, 0)][DBLP]
    CDES, 2006, pp:29-35 [Conf]
  44. Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir
    Multi-compilation: capturing interactions among concurrently-executing applications. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:157-170 [Conf]
  45. Seung Woo Son, Mahmut T. Kandemir
    Energy-aware data prefetching for multi-speed disks. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:105-114 [Conf]
  46. Ozcan Ozturk, Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:232-243 [Conf]
  47. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
    A Compiler-Guided Approach for Reducing Disk Power Consumption by Exploiting Disk Access Locality. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:256-268 [Conf]
  48. Guilin Chen, Mahmut T. Kandemir
    Optimizing Address Code Generation for Array-Intensive DSP Applications. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:141-152 [Conf]
  49. Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir
    Energy management schemes for memory-resident database systems. [Citation Graph (0, 0)][DBLP]
    CIKM, 2004, pp:218-227 [Conf]
  50. Murali Vilayannur, Mahmut T. Kandemir, Anand Sivasubramaniam
    Kernel-Level Caching for Optimizing I/O by Exploiting Inter-Application Data Sharing. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2002, pp:425-0 [Conf]
  51. Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mario Wolczko
    Tracking object life cycle for leakage energy optimization. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:213-218 [Conf]
  52. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne Wolf
    Energy savings through compression in embedded Java environments. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:163-168 [Conf]
  53. Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
    Analyzing heap error behavior in embedded JVM environments. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:230-235 [Conf]
  54. Ananth Hegde, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    VL-CDRAM: variable line sized cached DRAMs. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:132-137 [Conf]
  55. Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu, Guangyu Chen
    Locality-conscious process scheduling in embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:193-198 [Conf]
  56. Mahmut T. Kandemir, Ismail Kadayif
    Compiler-directed selection of dynamic memory layouts. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:219-224 [Conf]
  57. Mahmut T. Kandemir, Ismail Kadayif, Guilin Chen
    Compiler-directed code restructuring for reducing data TLB energy. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:98-103 [Conf]
  58. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:87-92 [Conf]
  59. Guangyu Chen, Mahmut T. Kandemir
    Improving java virtual machine reliability for memory-constrained embedded systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:690-695 [Conf]
  60. Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Scheduler-based DRAM energy management. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:697-702 [Conf]
  61. Feihui Li, Mahmut T. Kandemir
    Locality-conscious workload assignment for array-based computations in MPSOC architectures. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:95-100 [Conf]
  62. Ismail Kadayif, Mahmut T. Kandemir, Mustafa Karaköy
    An energy saving strategy based on adaptive loop parallelization. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:195-200 [Conf]
  63. Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
    An integer linear programming based approach for parallelizing applications in On-chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:703-708 [Conf]
  64. Mahmut T. Kandemir
    LODS: locality-oriented dynamic scheduling for on-chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:125-128 [Conf]
  65. Mahmut T. Kandemir, Alok N. Choudhary
    Compiler-directed scratch pad memory hierarchy design and management. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:628-633 [Conf]
  66. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Exploiting shared scratch pad memory space in embedded multiprocessor systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:219-224 [Conf]
  67. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    Dynamic Management of Scratch-Pad Memory Space. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:690-695 [Conf]
  68. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
    Influence of compiler optimizations on system power. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:304-307 [Conf]
  69. Victor De La Luz, Mahmut T. Kandemir, Ibrahim Kolcu
    Automatic data migration for reducing energy consumption in multi-bank memory systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:213-218 [Conf]
  70. Ozcan Ozturk, Guilin Chen, Mahmut T. Kandemir
    Optimizing code parallelization through a constraint network based approach. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:863-688 [Conf]
  71. Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, Guangyu Chen, Mary Jane Irwin
    Data compression for improving SPM behavior. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:401-406 [Conf]
  72. J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan
    Reducing Memory Requirements of Nested Loops for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:359-364 [Conf]
  73. Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    The design and use of simplepower: a cycle-accurate energy estimation tool. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:340-345 [Conf]
  74. Wei Zhang 0002, Guangyu Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Interprocedural optimizations for improving data cache performance of array-intensive embedded applications. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:887-892 [Conf]
  75. Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    A Constraint Network Based Approach to Memory Layout Optimization. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1156-1161 [Conf]
  76. Guilin Chen, Mahmut T. Kandemir, Ugur Sezer
    Configuration-Sensitive Process Scheduling for FPGA-Based Computing Platforms. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:486-493 [Conf]
  77. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Mustafa Karaköy
    Dynamic scratch-pad memory management for irregular array access patterns. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:931-936 [Conf]
  78. Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Compiler-Directed Instruction Duplication for Soft Error Detection. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1056-1057 [Conf]
  79. Jie S. Hu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Power-Efficient Trace Caches. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1091- [Conf]
  80. Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
    Scheduling Reusable Instructions for Power Reduction. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:148-155 [Conf]
  81. Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Thermal-Aware Task Allocation and Scheduling for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:898-899 [Conf]
  82. Ismail Kadayif, Mahmut T. Kandemir
    Tuning In-Sensor Data Filtering to Reduce Energy Consumption in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:852-857 [Conf]
  83. Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu
    Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1158-1163 [Conf]
  84. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:436-442 [Conf]
  85. Mahmut T. Kandemir
    A Compiler-Based Approach for Improving Intra-Iteration Data Reuse. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:984-991 [Conf]
  86. Mahmut T. Kandemir
    Impact of Data Transformations on Memory Bank Locality. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:506-511 [Conf]
  87. Mahmut T. Kandemir, Guilin Chen
    Locality-Aware Process Scheduling for Embedded MPSoCs. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:870-875 [Conf]
  88. Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu
    Activity clustering for leakage management in SPMs. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:696-697 [Conf]
  89. Mahmut T. Kandemir, Guangyu Chen, Wei Zhang 0002, Ibrahim Kolcu
    Data Space Oriented Scheduling in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10416-10421 [Conf]
  90. Mahmut T. Kandemir, Ibrahim Kolcu
    Reducing Cache Access Energy in Array-Intensive Application. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1092- [Conf]
  91. Mahmut T. Kandemir, Ibrahim Kolcu, Wei Zhang 0002
    Implementation and Evaluation of an On-Demand Parameter-Passing Strategy for Reducing Energy. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11058-11063 [Conf]
  92. Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangyu Chen, Ozcan Ozturk
    Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1026-1031 [Conf]
  93. Mahmut T. Kandemir, Wei Zhang 0002, Mustafa Karaköy
    Runtime Code Parallelization for On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10510-10515 [Conf]
  94. Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    A Crosstalk Aware Interconnect with Variable Cycle Transmission. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:102-107 [Conf]
  95. Victor De La Luz, Mahmut T. Kandemir, Ismail Kadayif, Ugur Sezer
    Generalized Data Transformations for Enhancing Cache Behavior. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10906-10911 [Conf]
  96. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary, Ismail Kadayif
    An Integrated Approach for Improving Cache Behavior. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10796-10801 [Conf]
  97. Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk
    Increasing Register File Immunity to Transient Errors. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:586-591 [Conf]
  98. Ozcan Ozturk, Mahmut T. Kandemir
    Nonuniform Banking for Reducing Memory Energy Consumption. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:814-819 [Conf]
  99. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    BB-GC: Basic-Block Level Garbage Collection. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1032-1037 [Conf]
  100. Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu
    Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:882-887 [Conf]
  101. Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir
    Data Windows: A Data-Centric Approach for Query Execution in Memory-Resident Databases. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1352-1353 [Conf]
  102. Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, R. R. Brooks, Soontae Kim, Wei Zhang 0002
    Masking the Energy Behavior of DES Encryption. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10084-10089 [Conf]
  103. Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
    Reliability-Centric High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1258-1263 [Conf]
  104. Liping Xue, Ozcan Ozturk, Feihui Li, Mahmut T. Kandemir, Ibrahim Kolcu
    Dynamic partitioning of processing and memory resources in embedded MPSoC architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:690-695 [Conf]
  105. Wei Zhang 0002, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De
    Compiler Support for Reducing Leakage Energy Consumption. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11146-11147 [Conf]
  106. Guangyu Chen, Ismail Kadayif, Wei Zhang 0002, Mahmut T. Kandemir, Ibrahim Kolcu, Ugur Sezer
    Compiler-Directed Management of Instruction Accesses. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:459-462 [Conf]
  107. Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif
    CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:41-49 [Conf]
  108. Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    A Data-Centric Approach to Checksum Reuse for Array-Intensive Applications. [Citation Graph (0, 0)][DBLP]
    DSN, 2005, pp:316-325 [Conf]
  109. Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Memory-Conscious Reliable Execution on Embedded Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DSN, 2006, pp:13-22 [Conf]
  110. Wei Zhang 0002, Sudhanva Gurumurthi, Mahmut T. Kandemir, Anand Sivasubramaniam
    ICR: In-Cache Replication for Enhancing Data Cache Reliability. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:291-0 [Conf]
  111. Feihui Li, Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Exploiting last idle periods of links for network power management. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:134-137 [Conf]
  112. Victor De La Luz, Mahmut T. Kandemir, Guangyu Chen, Ibrahim Kolcu
    Energy-Conscious Memory Allocation and Deallocation for Pointer-Intensive Applications. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2003, pp:156-172 [Conf]
  113. Guilin Chen, Mahmut T. Kandemir
    Optimizing inter-processor data locality on embedded chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:227-236 [Conf]
  114. Joseph Zambreno, Mahmut T. Kandemir, Alok N. Choudhary
    Enhancing Compiler Techniques for Memory Energy Optimizations. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2002, pp:364-381 [Conf]
  115. Mahmut T. Kandemir
    Data Space Oriented Tiling. [Citation Graph (0, 0)][DBLP]
    ESOP, 2002, pp:178-193 [Conf]
  116. Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhary, Ibrahim Kolcu
    Exploiting On-Chip Data Transfers for Improving Performance of Chip-Scale Multiprocessors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:271-278 [Conf]
  117. Ismail Kadayif, Mahmut T. Kandemir, Alok N. Choudhary, Mustafa Karaköy
    An Energy-Oriented Evaluation of Communication Optimizations for Microcensor Networks. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:279-286 [Conf]
  118. Ismail Kadayif, Mahmut T. Kandemir, I. Demirkiran
    Compiler-Guided Code Restructuring for Improving Instruction TLB Energy Behavior. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:304-309 [Conf]
  119. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    I/O-Conscious Tiling for Disk-Resident Data Sets. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:430-439 [Conf]
  120. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy, Prithviraj Banerjee
    Enhancing Spatial Locality via Data Layout Optimizations. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1998, pp:422-434 [Conf]
  121. Mahmut T. Kandemir, Ozcan Ozturk, Mary Jane Irwin, Ibrahim Kolcu
    Using Data Compression to Increase Energy Savings in Multi-bank Memories. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:310-317 [Conf]
  122. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Optimization of Out-of-Core Computations Using Chain Vectors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:601-608 [Conf]
  123. Victor De La Luz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
    Exploring the Possibility of Operating in the Compressed Domain. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:507-515 [Conf]
  124. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary
    Design and Evaluation of a Compiler-Directed Collective I/O Technique. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2000, pp:1263-1272 [Conf]
  125. Betül Demiröz, Haluk Topcuoglu, Mahmut T. Kandemir
    A Hybrid Evolutionary Algorithm for Solving the Register Allocation Problem. [Citation Graph (0, 0)][DBLP]
    EvoCOP, 2004, pp:62-71 [Conf]
  126. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary
    Exploiting Inter-File Access Patterns Using Multi-Collective I/O. [Citation Graph (0, 0)][DBLP]
    FAST, 2002, pp:245-258 [Conf]
  127. Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arif Rahman
    Switch Box Architectures for Three-Dimensional FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:335-336 [Conf]
  128. Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
    Reducing leakage energy in FPGAs using region-constrained placement. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:51-58 [Conf]
  129. Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
    A Dual-VDD Low Power FPGA Architecture. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:145-157 [Conf]
  130. Gokhan Memik, Mahmut T. Kandemir, Arindam Mallik
    Load elimination for low-power embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:282-285 [Conf]
  131. Ozcan Ozturk, Mahmut T. Kandemir
    Integer linear programming based energy optimization for banked DRAMs. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:92-95 [Conf]
  132. Ozcan Ozturk, Mahmut T. Kandemir
    Energy management in software-controlled multi-level memory hierarchies. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:270-275 [Conf]
  133. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    Using data compression in an MPSoC architecture for improving performance. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:353-356 [Conf]
  134. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Ibrahim Kolcu
    Tuning data replication for improving behavior of MPSoC applications. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:170-173 [Conf]
  135. Ozcan Ozturk, Mahmut T. Kandemir, Seung Woo Son, Mustafa Karaköy
    Selective code/data migration for reducing communication energy in embedded MpSoC architectures. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:386-391 [Conf]
  136. Ozcan Ozturk, Mahmut T. Kandemir, Suleyman Tosun
    An ILP based approach to address code generation for digital signal processors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:37-42 [Conf]
  137. Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
    Improving Offset Assignment on Embedded Processors Using Transformations. [Citation Graph (0, 0)][DBLP]
    HiPC, 2000, pp:367-374 [Conf]
  138. Amisha Parikh, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Energy-Aware Instruction Scheduling. [Citation Graph (0, 0)][DBLP]
    HiPC, 2000, pp:335-344 [Conf]
  139. Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Tao Li, Lizy Kurian John
    Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. [Citation Graph (0, 0)][DBLP]
    HPCA, 2002, pp:141-150 [Conf]
  140. Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
    DRAM Energy Management Using Software and Hardware Directed Power Mode Control. [Citation Graph (0, 0)][DBLP]
    HPCA, 2001, pp:159-170 [Conf]
  141. Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
    Tuning Garbage Collection in an Embedded Java Environment. [Citation Graph (0, 0)][DBLP]
    HPCA, 2002, pp:92-0 [Conf]
  142. Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir
    Organizing the Last Line of Defense before Hitting the Memory Wall for CMP. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:176-185 [Conf]
  143. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Restructuring I/O-Intensive Computations for Locality. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1999, pp:1097-1106 [Conf]
  144. Alok N. Choudhary, Mahmut T. Kandemir, Harsha S. Nagesh, Jaechun No, Xiaohui Shen, Valerie E. Taylor, Sachin More, Rajeev Thakur
    Data Management for Large-Scale Scientific Computations in High Performance Distributed Systems. [Citation Graph (0, 0)][DBLP]
    HPDC, 1999, pp:- [Conf]
  145. Guilin Chen, Mahmut T. Kandemir
    Code restructuring for improving cache performance of MPSoCs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:271-274 [Conf]
  146. Guilin Chen, Mahmut T. Kandemir
    Runtime integrity checking for inter-object connections. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:303-306 [Conf]
  147. Guilin Chen, Mahmut T. Kandemir, A. Nadgir, Ugur Sezer
    Array Composition and Decomposition for Optimizing Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:193-196 [Conf]
  148. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Ibrahim Kolcu
    Integrating loop and data optimizations for locality within a constraint network based framework. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:279-282 [Conf]
  149. Mahmut T. Kandemir
    2D data locality: definition, abstraction, and application. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:275-278 [Conf]
  150. Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, Ibrahim Kolcu
    Banked scratch-pad memory management for reducing leakage energy consumption. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:120-124 [Conf]
  151. Mahmut T. Kandemir, Ugur Sezer, Victor Delaluz
    Improving Memory Energy Using Access Pattern Classification. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:201-206 [Conf]
  152. Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Adapative Error Protection for Energy Efficiency. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:2-7 [Conf]
  153. Feihui Li, Guilin Chen, Mahmut T. Kandemir
    Compiler-directed voltage scaling on communication links for reducing power consumption. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:456-460 [Conf]
  154. Feihui Li, Guilin Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Improving scratch-pad memory reliability through compiler-guided data block duplication. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:1002-1005 [Conf]
  155. Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
    Improving soft-error tolerance of FPGA configuration bits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:107-110 [Conf]
  156. Priya Unnikrishnan, Guangyu Chen, Mahmut T. Kandemir, D. R. Mudgett
    Dynamic compilation for energy adaptation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:158-163 [Conf]
  157. Ozcan Ozturk, G. Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Cache miss clustering for banked memory systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:244-250 [Conf]
  158. Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan
    Reducing dTLB Energy Through Dynamic Resizing. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:358-363 [Conf]
  159. Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    A Framework for Energy Estimation of VLIW Architecture. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:40-45 [Conf]
  160. Sri Hari Krishna Narayanan, Guilin Chen, Mahmut T. Kandemir, Yuan Xie
    Temperature-Sensitive Loop Parallelization for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:677-682 [Conf]
  161. Samarjeet Singh Tomar, Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Use of Local Memory for Efficient Java Execution. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:468-476 [Conf]
  162. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
    Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPADS (1), 2006, pp:383-390 [Conf]
  163. Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Taylan Yemliha
    SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPADS (1), 2006, pp:391-400 [Conf]
  164. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1999, pp:95-102 [Conf]
  165. Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok N. Choudhary, David E. Bernholdt
    Performance Implications of Architectural and Software Techniques on I/O-Intensive Applications. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:493-0 [Conf]
  166. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Compiler Optimizations for I/O-Intensive Computations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1999, pp:164-171 [Conf]
  167. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Improving the Performance of Out-of-Core Computations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:128-136 [Conf]
  168. Mahmut T. Kandemir, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary
    Minimizing Data and Synchronization Costs in One-Way Communication. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:180-188 [Conf]
  169. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary
    Design and Evaluation of Smart Disk Architecture for DSS Commercial Workloads. [Citation Graph (0, 0)][DBLP]
    ICPP, 2000, pp:335-0 [Conf]
  170. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
    An integer linear programming approach for optimizing cache locality. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:500-509 [Conf]
  171. Mahmut T. Kandemir, Alok N. Choudhary, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
    A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:69-76 [Conf]
  172. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    A Compiler Algorithm for Optimizing Locality in Loop Nests. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1997, pp:269-276 [Conf]
  173. Xiaohui Shen, Wei-keng Liao, Alok N. Choudhary, Gokhan Memik, Mahmut T. Kandemir, Sachin More, George K. Thiruvathukal, Arti Singh
    A novel application development environment for large-scale scientific computations. [Citation Graph (0, 0)][DBLP]
    ICS, 2000, pp:274-283 [Conf]
  174. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
    Disk layout optimization for reducing energy consumption. [Citation Graph (0, 0)][DBLP]
    ICS, 2005, pp:274-283 [Conf]
  175. Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen
    A compiler approach for reducing data cache energy. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:76-85 [Conf]
  176. Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir
    A Window-Based Approach to Retrieving Memory-Resident Data for Query Execution. [Citation Graph (0, 0)][DBLP]
    IDEAS, 2004, pp:283-288 [Conf]
  177. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    A Unified Compiler Algorithm for Optimizing Locality, Parallelism and Communication in Out-of-core Computations. [Citation Graph (0, 0)][DBLP]
    IOPADS, 1997, pp:79-92 [Conf]
  178. R. Athavale, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Influence of Array Allocation Mechanisms on Memory System Energy. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2001, pp:3- [Conf]
  179. Guilin Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
    Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:34- [Conf]
  180. Guilin Chen, Mahmut T. Kandemir, Suleyman Tosun, Ugur Sezer
    Reliability-Conscious Process Scheduling under Performance Constraints in FPGA-Based Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  181. Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir, Padma Raghavan
    Reducing Power with Performance Constraints for Parallel Sparse Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  182. Kenin Coloma, Alok N. Choudhary, Avery Ching, Wei-keng Liao, Seung Woo Son, Mahmut T. Kandemir, Lee Ward
    Power and Performance in I/O for Scientific Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  183. Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:33- [Conf]
  184. Mahmut T. Kandemir
    Exploiting Memory Bank Locality in Multiprocessor SoC Architectures. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  185. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy
    A Generalized Framework for Global Communication Optimization. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:69-73 [Conf]
  186. Mahmut T. Kandemir, Rajesh Bordawekar, Alok N. Choudhary
    Data Access Reorganizations in Compiling Out-of-Core Data Parallel Programs on Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    IPPS, 1997, pp:559-0 [Conf]
  187. Mahmut T. Kandemir, Alok N. Choudhary
    Compiler-Directed I/O Optimization. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  188. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:738-743 [Conf]
  189. Feihui Li, Mahmut T. Kandemir
    Improving Performance of Java Applications Using a Coprocessor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  190. Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo
    Improving Java Performance Using Dynamic Method Migration on FPGAs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  191. Feihui Li, Pyush Agrawal, Grace Eberhardt, Eren Manavoglu, Secil Ugurel, Mahmut T. Kandemir
    Improving Memory Performance of Embedded Java Applications by Dynamic Layout Modifications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  192. Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin
    Exploiting Barriers to Optimize Power Consumption of CMPs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  193. Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Designing Energy-Efficient Software. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  194. Seung Woo Son, Mahmut T. Kandemir, Alok N. Choudhary
    Software-Directed Disk Power Management for Scientific Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  195. E. J. Swankoski, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    A Parallel Architecture for Secure FPGA Symmetric Encryption. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  196. Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin
    Enhancing L2 organization for CMPs with a center cell. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  197. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Integrated link/CPU voltage scaling for reducing energy consumption of parallel sparse matrix applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  198. Sudhanva Gurumurthi, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke
    DRPM: Dynamic Speed Control for Power Mangagement in Server Class Disks. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:169-179 [Conf]
  199. Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir
    Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:130-141 [Conf]
  200. Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye
    Energy-driven integrated hardware-software optimizations using SimplePower. [Citation Graph (0, 0)][DBLP]
    ISCA, 2000, pp:95-106 [Conf]
  201. Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk
    An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCIS, 2006, pp:267-276 [Conf]
  202. Guangyu Chen, Mahmut T. Kandemir
    Dataflow analysis for energy-efficient scratch-pad memory management. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:327-330 [Conf]
  203. G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Memory system energy (poster session): influence of hardware-software optimizations. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:244-246 [Conf]
  204. Jie S. Hu, A. Nadgir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
    Exploiting program hotspots and code sequentiality for instruction cache leakage management. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:402-407 [Conf]
  205. Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer
    Compiler support for block buffering. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:76-79 [Conf]
  206. Mahmut T. Kandemir, Seung Woo Son, Guangyu Chen
    An evaluation of code and data optimizations in the context of disk power reduction. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:209-214 [Conf]
  207. Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Soft error and energy consumption interactions: a data cache perspective. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:132-137 [Conf]
  208. Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Erik Brockmeyer, Francky Catthoor, Mary Jane Irwin
    Estimating influence of data layout optimizations on SDRAM energy consumption. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:40-43 [Conf]
  209. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali
    Power-aware partitioned cache architectures. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:64-67 [Conf]
  210. Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das
    Energy optimization techniques in cluster interconnects. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:459-464 [Conf]
  211. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
    Power-aware code scheduling for clusters of active disks. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:293-298 [Conf]
  212. Mahmut T. Kandemir, Seung Woo Son
    Reducing power through compiler-directed barrier synchronization elimination. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:354-357 [Conf]
  213. Hakduran Koc, Ozcan Ozturk, Mahmut T. Kandemir, Sri Hari Krishna Narayanan, Ehat Ercanli
    Minimizing energy consumption of banked memories using data recomputation. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:358-362 [Conf]
  214. Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke, Narayanan Vijaykrishnan, Mary Jane Irwin
    Interplay of energy and performance for disk arrays running transaction processing workloads. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2003, pp:123-132 [Conf]
  215. Ismail Kadayif, Partho Nath, Mahmut T. Kandemir, Anand Sivasubramaniam
    Compiler-directed physical address generation for reducing dTLB power. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:161-168 [Conf]
  216. Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Ozcan Ozturk
    Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:570-575 [Conf]
  217. Ozcan Ozturk, Mahmut T. Kandemir
    Data Replication in Banked DRAMs for Reducing Energy Consumption. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:551-556 [Conf]
  218. Ozcan Ozturk, Mahmut T. Kandemir, Ibrahim Kolcu
    Shared Scratch-Pad Memory Space Management. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:576-584 [Conf]
  219. Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
    Reliability-Centric Hardware/Software Co-Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:375-380 [Conf]
  220. Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
    An ILP Formulation for Reliability-Oriented High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:364-369 [Conf]
  221. Mahmut T. Kandemir, Ismail Kadayif, Ugur Sezer
    Exploiting scratch-pad memory using Presburger formulas. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:7-12 [Conf]
  222. Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
    Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:127-132 [Conf]
  223. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:20-25 [Conf]
  224. Guilin Chen, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir
    Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:90-95 [Conf]
  225. Feihui Li, Mahmut T. Kandemir
    Increasing Data TLB Resilience to Transient Errors. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:297-298 [Conf]
  226. M. Pirretti, Greg M. Link, R. R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Fault Tolerant Algorithms for Network-On-Chip Interconnect. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:46-51 [Conf]
  227. Hendra Saputra, Ozcan Ozturk, Narayanan Vijaykrishnan, Mahmut T. Kandemir, R. R. Brooks
    A Data-Driven Approach for Embedded Security. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:104-109 [Conf]
  228. Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Ozcan Ozturk, I. Demirkiran
    Compiler-Directed Management of Leakage Power in Software-Managed Memories. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:450-451 [Conf]
  229. Ozcan Ozturk, G. Chen, Mahmut T. Kandemir, Mustafa Karaköy
    An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:50-58 [Conf]
  230. Feihui Li, Mahmut T. Kandemir, Ibrahim Kolcu
    Exploiting Software Pipelining for Network-on-Chip architectures. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:295-302 [Conf]
  231. Feihui Li, Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Leakage-Aware SPM Management. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:393-398 [Conf]
  232. Hakduran Koc, Suleyman Tosun, Ozcan Ozturk, Mahmut T. Kandemir
    Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:448-449 [Conf]
  233. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Field level analysis for heap space optimization in embedded java environments. [Citation Graph (0, 0)][DBLP]
    ISMM, 2004, pp:131-142 [Conf]
  234. Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin
    Energy Behavior of Java Applications from the Memory Perspective. [Citation Graph (0, 0)][DBLP]
    Java™ Virtual Machine Research and Technology Symposium, 2001, pp:207-220 [Conf]
  235. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
    Adaptive Garbage Collection for Battery-Operated Environments. [Citation Graph (0, 0)][DBLP]
    Java™ Virtual Machine Research and Technology Symposium, 2002, pp:1-12 [Conf]
  236. Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
    Improving Offset Assignment for Embedded Processors. [Citation Graph (0, 0)][DBLP]
    LCPC, 2000, pp:158-172 [Conf]
  237. Guilin Chen, Mahmut T. Kandemir, A. Nadgir
    Compiler-Based Code Partitioning for Intelligent Embedded Disk Processing. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:451-465 [Conf]
  238. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir
    An ILP-Based Approach to Locality Optimization. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:149-163 [Conf]
  239. Ismail Kadayif, Mahmut T. Kandemir, Alok N. Choudhary
    A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality. [Citation Graph (0, 0)][DBLP]
    LCPC, 2002, pp:111-125 [Conf]
  240. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
    A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. [Citation Graph (0, 0)][DBLP]
    LCPC, 1998, pp:34-50 [Conf]
  241. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
    Experimental Evaluation of Energy Behavior of Iteration Space Tiling. [Citation Graph (0, 0)][DBLP]
    LCPC, 2000, pp:142-157 [Conf]
  242. Victor De La Luz, Mahmut T. Kandemir, Ugur Sezer
    Improving Off-Chip Memory Energy Behavior in a Multi-processor, Multi-bank Environment. [Citation Graph (0, 0)][DBLP]
    LCPC, 2001, pp:100-114 [Conf]
  243. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhary
    Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:450-457 [Conf]
  244. Mahmut T. Kandemir
    A Collective I/O Scheme Based on Compiler Analysis. [Citation Graph (0, 0)][DBLP]
    LCR, 2000, pp:1-15 [Conf]
  245. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Improving Locality in Out-of-Core Computations Using Data Layout Transformations. [Citation Graph (0, 0)][DBLP]
    LCR, 1998, pp:359-366 [Conf]
  246. Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Compiler-directed thermal management for VLIW functional units. [Citation Graph (0, 0)][DBLP]
    LCTES, 2006, pp:163-172 [Conf]
  247. Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang 0002
    Compiler-directed cache polymorphism. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:165-174 [Conf]
  248. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam
    Morphable Cache Architectures: Potential Benefits. [Citation Graph (0, 0)][DBLP]
    LCTES/OM, 2001, pp:128-137 [Conf]
  249. Mahmut T. Kandemir, Guangyu Chen, Ismail Kadayif
    Compiling for memory emergency. [Citation Graph (0, 0)][DBLP]
    LCTES, 2005, pp:213-221 [Conf]
  250. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
    Towards Energy-Aware Iteration Space Tiling. [Citation Graph (0, 0)][DBLP]
    LCTES, 2000, pp:211-215 [Conf]
  251. Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Adapting instruction level parallelism for optimizing leakage in VLIW architectures. [Citation Graph (0, 0)][DBLP]
    LCTES, 2003, pp:275-283 [Conf]
  252. Hendra Saputra, Guangyu Chen, R. R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Code protection for resource-constrained embedded devices. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:240-248 [Conf]
  253. Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer
    Energy-conscious compilation based on voltage scaling. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:2-11 [Conf]
  254. K. Basu, Alok N. Choudhary, Jayaprakash Pisharath, Mahmut T. Kandemir
    Power protocol: reducing power dissipation on off-chip data buses. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:345-355 [Conf]
  255. Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen
    Generating physical addresses directly for saving instruction TLB energy. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:185-196 [Conf]
  256. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Improving Locality Using Loop and Data Transformations in an Integrated Framework. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:285-297 [Conf]
  257. Wei Zhang 0002, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Compiler-directed instruction cache leakage optimization. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:208-218 [Conf]
  258. Wei Zhang 0002, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai
    Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:102-113 [Conf]
  259. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary, Valerie E. Taylor
    APRIL: A Run-Time Library for Tape-Resident Data. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Mass Storage Systems, 2000, pp:61-74 [Conf]
  260. Steve C. Chiu, Alok N. Choudhary, Mahmut T. Kandemir
    Fault Recovery Designs for Processor-Embedded Distributed Storage Architectures with I/O-Intensive DB Workloads. [Citation Graph (0, 0)][DBLP]
    MSST, 2005, pp:278-285 [Conf]
  261. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Bernd Mathiske, Mario Wolczko
    Heap compression for memory-constrained Java environments. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2003, pp:282-301 [Conf]
  262. Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    vEC: virtual energy counters. [Citation Graph (0, 0)][DBLP]
    PASTE, 2001, pp:28-31 [Conf]
  263. Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam
    A Holistic Approach to System Level Energy Optimization. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:88-107 [Conf]
  264. Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir
    Optimizing Bus Energy Consumption of On-Chip Multiprocessors Using Frequent Values. [Citation Graph (0, 0)][DBLP]
    PDP, 2004, pp:340-0 [Conf]
  265. Murali Vilayannur, Robert B. Ross, Philip H. Carns, Rajeev Thakur, Anand Sivasubramaniam, Mahmut T. Kandemir
    On the Performance of the POSIX I/O Interface to PVFS. [Citation Graph (0, 0)][DBLP]
    PDP, 2004, pp:332-339 [Conf]
  266. Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin
    Reducing NoC energy consumption through compiler-directed channel voltage scaling. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:193-203 [Conf]
  267. Guangyu Chen, Feihui Li, Mahmut T. Kandemir
    Compiler-directed channel allocation for saving power in on-chip networks. [Citation Graph (0, 0)][DBLP]
    POPL, 2006, pp:194-205 [Conf]
  268. Mahmut T. Kandemir
    A compiler technique for improving whole-program locality. [Citation Graph (0, 0)][DBLP]
    POPL, 2001, pp:179-192 [Conf]
  269. Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhary
    Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:174-185 [Conf]
  270. Mahmut T. Kandemir, Rajesh Bordawekar, Alok N. Choudhary
    I/O Optimizations for Compiling Out-of Core Programs on Distributed-Memory Machines. [Citation Graph (0, 0)][DBLP]
    PPSC, 1997, pp:- [Conf]
  271. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays. [Citation Graph (0, 0)][DBLP]
    PPSC, 1999, pp:- [Conf]
  272. Guilin Chen, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir
    An Adaptive Locality-Conscious Process Scheduler for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:354-364 [Conf]
  273. Mahmut T. Kandemir
    A dynamic locality optimization algorithm for linear algebra codes. [Citation Graph (0, 0)][DBLP]
    SAC, 2001, pp:632-635 [Conf]
  274. Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Memory Space Conscious Loop Iteration Duplication for Reliable Execution. [Citation Graph (0, 0)][DBLP]
    SAS, 2005, pp:52-69 [Conf]
  275. Priya Unnikrishnan, Guangyu Chen, Mahmut T. Kandemir, Mustafa Karaköy, Ibrahim Kolcu
    Loop Transformations for Reducing Data Space Requirements of Resource-Constrained Applications. [Citation Graph (0, 0)][DBLP]
    SAS, 2003, pp:383-400 [Conf]
  276. Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Sudhanva Gurumurthi
    Analyzing energy behavior of spatial access methods for memory-resident data. [Citation Graph (0, 0)][DBLP]
    VLDB, 2001, pp:411-420 [Conf]
  277. Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu
    Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:288-0 [Conf]
  278. N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary
    Strategies for Improving Data Locality in Embedded Applications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:631-0 [Conf]
  279. David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
    Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:248-253 [Conf]
  280. J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir
    A Heuristic for Clock Selection in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:414-419 [Conf]
  281. J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir
    Address Code and Arithmetic Optimizations for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:619-624 [Conf]
  282. U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir
    Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:305-310 [Conf]
  283. Taylan Yemliha, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Vijay Degalahal
    Compiler-Directed Code Restructuring for Operating with Compressed Arrays. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:221-226 [Conf]
  284. Feihui Li, Guilin Chen, Mahmut T. Kandemir, Ozcan Ozturk, Mustafa Karaköy, R. Ramanarayanan, Balaji Vaidyanathan
    A Process Scheduler-Based Approach to NoC Power Management. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:77-82 [Conf]
  285. Liping Xue, Mahmut T. Kandemir, Guilin Chen, Feihui Li, Ozcan Ozturk, R. Ramanarayanan, Balaji Vaidyanathan
    Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:251-258 [Conf]
  286. Mahmut T. Kandemir, Ozcan Ozturk, Vijay Degalahal
    Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:227-232 [Conf]
  287. Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin
    Exploiting frequent field values in java objects for reducing heap memory requirements. [Citation Graph (0, 0)][DBLP]
    VEE, 2005, pp:68-78 [Conf]
  288. Alok N. Choudhary, Mahmut T. Kandemir, Jaechun No, Gokhan Memik, Xiaohui Shen, Wei-keng Liao, Harsha S. Nagesh, Sachin More, Valerie E. Taylor, Rajeev Thakur, Rick L. Stevens
    Data management for large-scale scientific computations in high performance distributed systems. [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 2000, v:3, n:1, pp:45-60 [Journal]
  289. Murali Vilayannur, Anand Sivasubramaniam, Mahmut T. Kandemir, Rajeev Thakur, Robert B. Ross
    Discretionary Caching for I/O on Clusters. [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 2006, v:9, n:1, pp:29-44 [Journal]
  290. Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew
    Changing Interaction of Compiler and Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:12, pp:51-58 [Journal]
  291. Sudhanva Gurumurthi, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke
    Reducing Disk Power Consumption in Servers with DRPM. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:12, pp:59-66 [Journal]
  292. Nam Sung Kim, Todd M. Austin, David Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan
    Leakage Current: Moore's Law Meets Static Power. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:12, pp:68-75 [Journal]
  293. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne Wolf
    Using Memory Compression for Energy Reduction in an Embedded Java System. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2002, v:11, n:5, pp:537-556 [Journal]
  294. Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
    Managing Leakage Energy in Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal]
  295. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    Locality Optimization Algorithms for Compilation of Out-of-Core Codes. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1998, v:14, n:1, pp:107-138 [Journal]
  296. Steve C. Chiu, Wei-keng Liao, Alok N. Choudhary, Mahmut T. Kandemir
    Processor-embedded distributed smart disks for I/O-intensive workloads: architectures, performance models and evaluation. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2004, v:64, n:3, pp:427-446 [Journal]
  297. Steve C. Chiu, Wei-keng Liao, Alok N. Choudhary, Mahmut T. Kandemir
    Processor-embedded distributed smart disks for I/O-intensive workloads: architectures, performance models and evaluation. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:4, pp:532-551 [Journal]
  298. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    An integer linear programming-based tool for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:3, pp:247-260 [Journal]
  299. Mahmut T. Kandemir
    Improving whole-program locality using intra-procedural and inter-procedural transformations, . [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:5, pp:564-582 [Journal]
  300. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Matrix-Based Approach to Global Locality Optimization. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1999, v:58, n:2, pp:190-235 [Journal]
  301. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed-Memory Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2000, v:60, n:8, pp:924-965 [Journal]
  302. Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhary
    Design and Evaluation of a Smart Disk Cluster for DSS Commercial Workloads. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2001, v:61, n:11, pp:1633-1664 [Journal]
  303. Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir
    Optimizing bus energy consumption of on-chip multiprocessors using frequent values. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:2, pp:129-142 [Journal]
  304. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Rajesh Bordawekar
    Compilation Techniques for Out-of-Core Parallel Computations. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1998, v:24, n:3-4, pp:597-628 [Journal]
  305. Wayne Wolf, Mahmut T. Kandemir
    Memory system optimization of embedded software. [Citation Graph (0, 0)][DBLP]
    Proceedings of the IEEE, 2003, v:91, n:1, pp:165-182 [Journal]
  306. Wei Zhang 0002, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Reducing instruction cache energy consumption using a compiler-based strategy. [Citation Graph (0, 0)][DBLP]
    TACO, 2004, v:1, n:1, pp:3-33 [Journal]
  307. Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
    Hardware and Software Techniques for Controlling DRAM Power Modes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1154-1173 [Journal]
  308. Mahmut T. Kandemir, J. Ramanujam
    Data Relation Vectors: A New Abstraction for Data Optimizations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:8, pp:798-810 [Journal]
  309. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Improving Cache Locality by a Combination of Loop and Data Transformation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:159-167 [Journal]
  310. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
    A Layout-Conscious Iteration Space Transformation Technique. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:12, pp:1321-1336 [Journal]
  311. Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das
    A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:6, pp:660-671 [Journal]
  312. Victor De La Luz, Mahmut T. Kandemir
    Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:1, pp:1-19 [Journal]
  313. Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte
    Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:1, pp:59-76 [Journal]
  314. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:243-260 [Journal]
  315. Victor De La Luz, Mahmut T. Kandemir, Ibrahim Kolcu
    Reducing memory energy consumption of embedded applications that process dynamically allocated data. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:9, pp:1855-1860 [Journal]
  316. Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
    Tuning garbage collection for reducing memory system energy in an embedded java environment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2002, v:1, n:1, pp:27-55 [Journal]
  317. Wei Zhang 0002, Mahmut T. Kandemir, Mustafa Karaköy, Guangyu Chen
    Reducing data cache leakage energy using a compiler-based approach. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:652-678 [Journal]
  318. J. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Analyzing data reuse for cache reconfiguration. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:4, pp:851-876 [Journal]
  319. Ismail Kadayif, Mahmut T. Kandemir
    Data space-oriented tiling for enhancing locality. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:2, pp:388-414 [Journal]
  320. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
    Compiler-directed high-level energy estimation and optimization. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:4, pp:819-850 [Journal]
  321. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
    Partitioned instruction cache architecture for energy efficiency. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2003, v:2, n:2, pp:163-185 [Journal]
  322. Wei Zhang 0002, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Reducing dynamic and leakage energy in VLIW architectures. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:1, pp:1-28 [Journal]
  323. Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam
    Reducing code size through address register assignment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:1, pp:225-258 [Journal]
  324. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2002, v:21, n:3, pp:257-284 [Journal]
  325. Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen
    Optimizing instruction TLB energy using software and hardware techniques. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:2, pp:229-257 [Journal]
  326. Mahmut T. Kandemir
    Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:2, pp:410-441 [Journal]
  327. Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer
    Improving the energy behavior of block buffering using compiler optimizations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:228-250 [Journal]
  328. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy
    A global communication optimization technique based on data-flow analysis and linear algebra. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1999, v:21, n:6, pp:1251-1297 [Journal]
  329. Gokhan Memik, Mahmut T. Kandemir, Wei-keng Liao, Alok N. Choudhary
    Multicollective I/O: A technique for exploiting inter-file access patterns. [Citation Graph (0, 0)][DBLP]
    TOS, 2006, v:2, n:3, pp:349-369 [Journal]
  330. Guangyu Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
    Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:9, pp:795-809 [Journal]
  331. Victor M. DeLaLuz, Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
    Access Pattern Restructuring for Memory Energy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:4, pp:289-303 [Journal]
  332. Ismail Kadayif, Mahmut T. Kandemir
    Quasidynamic Layout Optimizations for Improving Data Locality. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:11, pp:996-1011 [Journal]
  333. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Ozcan Ozturk, Mustafa Karaköy, Ugur Sezer
    Optimizing Array-Intensive Applications for On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:5, pp:396-411 [Journal]
  334. Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok N. Choudhary, David E. Bernholdt
    An Experimental Evaluation of I/O Optimizations on Different Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:7, pp:728-744 [Journal]
  335. Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok N. Choudhary, David E. Bernholdt
    An Experimental Evaluation of I/O Optimizations on Different Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:12, pp:1303-1319 [Journal]
  336. Mahmut T. Kandemir
    Compiler-Directed Collective-I/O. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:12, pp:1318-1331 [Journal]
  337. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
    Static and Dynamic Locality Optimizations Using Integer Linear Programming. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:9, pp:922-941 [Journal]
  338. Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, Nagaraj Shenoy
    Minimizing Data and Synchronization Costs in One-Way Communication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:12, pp:1232-1251 [Journal]
  339. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2003, v:14, n:4, pp:337-354 [Journal]
  340. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    A Unified Framework for Optimizing Locality, Parallelism, and Communication in Out-of-Core Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:7, pp:648-668 [Journal]
  341. Mahmut T. Kandemir, Alok N. Choudhary, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
    A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:2, pp:115-135 [Journal]
  342. Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu
    Compiler-guided leakage optimization for banked scratch-pad memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1136-1146 [Journal]
  343. Mahmut T. Kandemir, Ismail Kadayif, Alok N. Choudhary, Ibrahim Kolcu
    Compiler-directed scratch pad memory optimization for embedded multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:3, pp:281-287 [Journal]
  344. Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Soft errors issues in low-power caches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1157-1166 [Journal]
  345. Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Energy-performance trade-offs for spatial access methods on memory-resident data. [Citation Graph (0, 0)][DBLP]
    VLDB J., 2002, v:11, n:3, pp:179-197 [Journal]
  346. Andrea Marongiu, Luca Benini, Mahmut T. Kandemir
    Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:145-149 [Conf]
  347. Liping Xue, Ozcan Ozturk, Mahmut T. Kandemir
    A Memory-Conscious Code Parallelization Scheme. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:230-233 [Conf]
  348. Hakduran Koc, Mahmut T. Kandemir, Ehat Ercanli, Ozcan Ozturk
    Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:224-229 [Conf]
  349. Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son, Ozcan Ozturk
    Memory bank aware dynamic loop scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1671-1676 [Conf]
  350. S. H. K. Narayanan, Mahmut T. Kandemir, R. Brooks
    Performance aware secure code partitioning. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1122-1127 [Conf]
  351. Wei-keng Liao, Avery Ching, Kenin Coloma, Alok N. Choudhary, Mahmut T. Kandemir
    Improving MPI Independent Write Performance Using A Two-Stage Write-Behind Buffering Method. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  352. Guangyu Chen, Feihui Li, Mahmut T. Kandemir
    Compiler-directed application mapping for NoC based chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2007, pp:155-157 [Conf]
  353. Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Profile-driven energy reduction in network-on-chips. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:394-404 [Conf]
  354. Ismail Kadayif, Mahmut T. Kandemir
    Modeling and improving data cache reliability. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 2007, pp:1-12 [Conf]
  355. Mahmut T. Kandemir, Guilin Chen
    Locality-Aware Process Scheduling for Embedded MPSoCs [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  356. W.-L. Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Thermal-Aware Task Allocation and Scheduling for Embedded Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  357. Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
    Reliability-Centric High-Level Synthesis [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  358. Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu
    Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  359. G. Chen, Mahmut T. Kandemir, Mustafa Karaköy
    A Constraint Network Based Approach to Memory Layout Optimization [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  360. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Reducing energy consumption of parallel sparse matrix applications through integrated link/CPU voltage scaling. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2007, v:41, n:3, pp:179-213 [Journal]
  361. Seung Woo Son, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Alok N. Choudhary
    Compiler-Directed Energy Optimization for Parallel Disk Based Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:9, pp:1241-1257 [Journal]
  362. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
    Influence of compiler optimizations on system power. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:6, pp:801-804 [Journal]

  363. Ring Prediction for Non-Uniform Cache Architectures. [Citation Graph (, )][DBLP]


  364. Reducing Energy Consumption of On-Chip Networks Through a Hybrid Compiler-Runtime Approach. [Citation Graph (, )][DBLP]


  365. Profiler and compiler assisted adaptive I/O prefetching for shared storage caches. [Citation Graph (, )][DBLP]


  366. Dynamic Storage Cache Partitioning Using Feedback Control Theory. [Citation Graph (, )][DBLP]


  367. Power Aware Disk Allocation. [Citation Graph (, )][DBLP]


  368. Topology-Aware I/O Caching for Shared Storage Systems. [Citation Graph (, )][DBLP]


  369. A Systematic Approach to Automatically Generate Multiple Semantically Equivalent Program Versions. [Citation Graph (, )][DBLP]


  370. Adaptive set pinning: managing shared caches in chip multiprocessors. [Citation Graph (, )][DBLP]


  371. Slicing based code parallelization for minimizing inter-processor communication. [Citation Graph (, )][DBLP]


  372. Markov Model Based Disk Power Management for Data Intensive Workloads. [Citation Graph (, )][DBLP]


  373. MPISec I/O: Providing Data Confidentiality in MPI-I/O. [Citation Graph (, )][DBLP]


  374. Runtime system support for software-guided disk power management. [Citation Graph (, )][DBLP]


  375. Improving I/O performance using soft-QoS-based dynamic storage cache partitioning. [Citation Graph (, )][DBLP]


  376. Application mapping for chip multiprocessors. [Citation Graph (, )][DBLP]


  377. Dynamic thread and data mapping for NoC based CMPs. [Citation Graph (, )][DBLP]


  378. Using dynamic compilation for continuing execution under reduced memory availability. [Citation Graph (, )][DBLP]


  379. Process variation aware thread mapping for Chip Multiprocessors. [Citation Graph (, )][DBLP]


  380. Adaptive prefetching for shared cache based chip multiprocessors. [Citation Graph (, )][DBLP]


  381. Feedback control for providing QoS in NoC based multicores. [Citation Graph (, )][DBLP]


  382. A special-purpose compiler for look-up table and code generation for function evaluation. [Citation Graph (, )][DBLP]


  383. Exploring parallelization strategies for NUFFT data translation. [Citation Graph (, )][DBLP]


  384. Hybrid Techniques for Fast Multicore Simulation. [Citation Graph (, )][DBLP]


  385. Code Scheduling for Optimizing Parallelism and Data Locality. [Citation Graph (, )][DBLP]


  386. Scalable Parallelization Strategies to Accelerate NuFFT Data Translation on Multicores. [Citation Graph (, )][DBLP]


  387. Improving I/O Performance of Applications through Compiler-Directed Code Restructuring. [Citation Graph (, )][DBLP]


  388. TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms. [Citation Graph (, )][DBLP]


  389. SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs. [Citation Graph (, )][DBLP]


  390. Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. [Citation Graph (, )][DBLP]


  391. Communication Based Proactive Link Power Management. [Citation Graph (, )][DBLP]


  392. In-Network Caching for Chip Multiprocessors. [Citation Graph (, )][DBLP]


  393. Computation mapping for multi-level storage cache hierarchies. [Citation Graph (, )][DBLP]


  394. Cashing in on hints for better prefetching and caching in PVFS and MPI-IO. [Citation Graph (, )][DBLP]


  395. Data locality enhancement for CMPs. [Citation Graph (, )][DBLP]


  396. Integrated code and data placement in two-dimensional mesh based chip multiprocessors. [Citation Graph (, )][DBLP]


  397. SPM management using Markov chain based data access prediction. [Citation Graph (, )][DBLP]


  398. Ring data location prediction scheme for Non-Uniform Cache Architectures. [Citation Graph (, )][DBLP]


  399. Adaptive multi-level cache allocation in distributed storage architectures. [Citation Graph (, )][DBLP]


  400. Managing power, performance and reliability trade-offs. [Citation Graph (, )][DBLP]


  401. Towards energy efficient scaling of scientific codes. [Citation Graph (, )][DBLP]


  402. A helper thread based EDP reduction scheme for adapting application execution in CMPs. [Citation Graph (, )][DBLP]


  403. Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. [Citation Graph (, )][DBLP]


  404. Improving I/O performance through compiler-directed code restructuring and adaptive prefetching. [Citation Graph (, )][DBLP]


  405. An ilp based approach to reducing energy consumption in nocbased CMPS. [Citation Graph (, )][DBLP]


  406. Phase-aware adaptive hardware selection for power-efficient scientific computations. [Citation Graph (, )][DBLP]


  407. Improving disk reuse for reducing power consumption. [Citation Graph (, )][DBLP]


  408. Pro-active Page Replacement for Scientific Applications: A Characterization. [Citation Graph (, )][DBLP]


  409. A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm. [Citation Graph (, )][DBLP]


  410. Compiler directed network-on-chip reliability enhancement for chip multiprocessors. [Citation Graph (, )][DBLP]


  411. Optimizing shared cache behavior of chip multiprocessors. [Citation Graph (, )][DBLP]


  412. SHARP control: controlled shared cache management in chip multiprocessors. [Citation Graph (, )][DBLP]


  413. Cache topology aware computation mapping for multicores. [Citation Graph (, )][DBLP]


  414. Enhancing the performance of MPI-IO applications by overlapping I/O, computation and communication. [Citation Graph (, )][DBLP]


  415. A compiler-directed data prefetching scheme for chip multiprocessors. [Citation Graph (, )][DBLP]


  416. Intra-application shared cache partitioning for multithreaded applications. [Citation Graph (, )][DBLP]


  417. A novel migration-based NUCA design for chip multiprocessors. [Citation Graph (, )][DBLP]


  418. Prefetch throttling and data pinning for improving performance of shared caches. [Citation Graph (, )][DBLP]


  419. A case for integrated processor-cache partitioning in chip multiprocessors. [Citation Graph (, )][DBLP]


  420. Dynamic storage cache allocation in multi-server architectures. [Citation Graph (, )][DBLP]


  421. Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. [Citation Graph (, )][DBLP]


  422. Software-directed combined cpu/link voltage scaling fornoc-based cmps. [Citation Graph (, )][DBLP]


  423. Coordinated power management of voltage islands in CMPs. [Citation Graph (, )][DBLP]


  424. A hardware-software codesign strategy for Loop intensive applications. [Citation Graph (, )][DBLP]


  425. Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations. [Citation Graph (, )][DBLP]


  426. Preface. [Citation Graph (, )][DBLP]


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