The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
J. Ramanujam: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Matrix-Based Approach to the Global Locality Optimization Problem. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:306-313 [Conf]
  2. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:203-211 [Conf]
  3. Mahmut T. Kandemir, J. Ramanujam
    Data Relation Vectors: A New Abstraction for Data Optimizations. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:227-236 [Conf]
  4. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1997, pp:236-0 [Conf]
  5. N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary
    Strategies for Improving Data Locality in Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:631-638 [Conf]
  6. J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir
    A Heuristic for Clock Selection in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:414-419 [Conf]
  7. J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir
    Address Code and Arithmetic Optimizations for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:619-624 [Conf]
  8. Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, J. Ramanujam
    Address Register Assignment for Reducing Code Size. [Citation Graph (0, 0)][DBLP]
    CC, 2003, pp:273-289 [Conf]
  9. J. Ramanujam
    Integer Lattice Based Methods for Local Address Generation for Block-Cyclic Distributions. [Citation Graph (0, 0)][DBLP]
    Compiler Optimizations for Scalable Parallel Systems Languages, 2001, pp:597-648 [Conf]
  10. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Exploiting shared scratch pad memory space in embedded multiprocessor systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:219-224 [Conf]
  11. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    Dynamic Management of Scratch-Pad Memory Space. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:690-695 [Conf]
  12. M. Narasimhan, J. Ramanujam
    On lower bounds for scheduling problems in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:546-551 [Conf]
  13. J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan
    Reducing Memory Requirements of Nested Loops for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:359-364 [Conf]
  14. Rajesh Bordawekar, Alok N. Choudhary, J. Ramanujam
    A Framework for Integrated Communication and I/O Placement. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. I, 1996, pp:541-552 [Conf]
  15. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    I/O-Conscious Tiling for Disk-Resident Data Sets. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:430-439 [Conf]
  16. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy, Prithviraj Banerjee
    Enhancing Spatial Locality via Data Layout Optimizations. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1998, pp:422-434 [Conf]
  17. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Optimization of Out-of-Core Computations Using Chain Vectors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:601-608 [Conf]
  18. Daniel Cociorva, J. W. Wilkins, Gerald Baumgartner, P. Sadayappan, J. Ramanujam, Marcel Nooijen, David E. Bernholdt, Robert J. Harrison
    Towards Automatic Synthesis of High-Performance Codes for Electronic Structure Calculations: Data Locality Optimization. [Citation Graph (0, 0)][DBLP]
    HiPC, 2001, pp:237-248 [Conf]
  19. Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
    Improving Offset Assignment on Embedded Processors Using Transformations. [Citation Graph (0, 0)][DBLP]
    HiPC, 2000, pp:367-374 [Conf]
  20. Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Daniel Cociorva, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, David E. Bernholdt, Venkatesh Choppella
    Data Locality Optimization for Synthesis of Efficient Out-of-Core Algorithms. [Citation Graph (0, 0)][DBLP]
    HiPC, 2003, pp:406-417 [Conf]
  21. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Restructuring I/O-Intensive Computations for Locality. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1999, pp:1097-1106 [Conf]
  22. Albert Hartono, Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Marcel Nooijen, Gerald Baumgartner, David E. Bernholdt, Venkatesh Choppella, Russell M. Pitzer, J. Ramanujam, Atanas Rountev, P. Sadayappan
    Identifying Cost-Effective Common Subexpressions to Reduce Operation Count in Tensor Contraction Evaluations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2006, pp:267-275 [Conf]
  23. Albert Hartono, Alexander Sibiryakov, Marcel Nooijen, Gerald Baumgartner, David E. Bernholdt, So Hirata, Chi-Chung Lam, Russell M. Pitzer, J. Ramanujam, P. Sadayappan
    Automated Operation Minimization of Tensor Contraction Expressions in Electronic Structure Calculations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2005, pp:155-164 [Conf]
  24. M. Narasimhan, J. Ramanujam
    Improving the computational performance of ILP-based problems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:593-596 [Conf]
  25. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1999, pp:95-102 [Conf]
  26. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Compiler Optimizations for I/O-Intensive Computations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1999, pp:164-171 [Conf]
  27. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Improving the Performance of Out-of-Core Computations. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:128-136 [Conf]
  28. Mahmut T. Kandemir, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary
    Minimizing Data and Synchronization Costs in One-Way Communication. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:180-188 [Conf]
  29. J. Ramanujam, P. Sadayappan
    Tiling of Iteration Spaces for Multicomputers. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1990, pp:179-186 [Conf]
  30. Rajesh Bordawekar, Alok N. Choudhary, J. Ramanujam
    Automatic Optimization of Communication in Compiling Out-of-Core Stencil Codes. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1996, pp:366-373 [Conf]
  31. Daniel Cociorva, J. W. Wilkins, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan
    Loop optimization for a class of memory-constrained computations. [Citation Graph (0, 0)][DBLP]
    ICS, 2001, pp:103-113 [Conf]
  32. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
    An integer linear programming approach for optimizing cache locality. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:500-509 [Conf]
  33. Mahmut T. Kandemir, Alok N. Choudhary, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
    A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:69-76 [Conf]
  34. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    A Compiler Algorithm for Optimizing Locality in Loop Nests. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1997, pp:269-276 [Conf]
  35. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    A Unified Compiler Algorithm for Optimizing Locality, Parallelism and Communication in Out-of-core Computations. [Citation Graph (0, 0)][DBLP]
    IOPADS, 1997, pp:79-92 [Conf]
  36. Gerald Baumgartner, David E. Bernholdt, Daniel Cociorva, Chi-Chung Lam, J. Ramanujam, Robert J. Harrison, Marcel Nooijen, P. Sadayappan
    A Performance Optimization Framework for Compilation of Tensor Contraction Expressions into Parallel Programs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  37. Daniel Cociorva, Xiaoyang Gao, Sandhya Krishnan, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam
    Global Communication Optimization for Tensor Contraction Expressions under Memory Constraints. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:37- [Conf]
  38. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy
    A Generalized Framework for Global Communication Optimization. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:69-73 [Conf]
  39. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:738-743 [Conf]
  40. S. D. Kaushik, Chua-Huang Huang, J. Ramanujam, P. Sadayappan
    Multi-phase array redistribution: modeling and evaluation. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:441-445 [Conf]
  41. Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Chi-Chung Lam, J. Ramanujam, P. Sadayappan, Venkatesh Choppella
    Efficient Synthesis of Out-of-Core Algorithms Using a Nonlinear Optimization Solver. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  42. J. Ramanujam
    Optimal Software Pipelining of Nested Loops. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:335-342 [Conf]
  43. J. Ramanujam, S. Vasanthakumar
    Statement-level independent partitioning of uniform recurrences. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:229-233 [Conf]
  44. A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sadayappan
    Memory minimization for tensor contractions using integer linear programming. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  45. Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer
    Compiler support for block buffering. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:76-79 [Conf]
  46. Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
    Improving Offset Assignment for Embedded Processors. [Citation Graph (0, 0)][DBLP]
    LCPC, 2000, pp:158-172 [Conf]
  47. Daniel Cociorva, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam
    Memory-Constrained Communication Minimization for a Class of Array Computations. [Citation Graph (0, 0)][DBLP]
    LCPC, 2002, pp:1-15 [Conf]
  48. Alina Bibireata, Sandhya Krishnan, Gerald Baumgartner, Daniel Cociorva, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, David E. Bernholdt, Venkatesh Choppella
    Memory-Constrained Data Locality Optimization for Tensor Contractions. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:93-108 [Conf]
  49. Vipin Jain, Siddharth Rele, Santosh Pande, J. Ramanujam
    Code Restructuring for Improving Real Time Response through Code Speed, Size Trade-offs on Limited Memory Embedded DSPs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1999, pp:459-463 [Conf]
  50. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
    A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. [Citation Graph (0, 0)][DBLP]
    LCPC, 1998, pp:34-50 [Conf]
  51. Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Gerald Baumgartner, J. Ramanujam, P. Sadayappan
    Empirical Performance-Model Driven Data Layout Optimization. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:72-86 [Conf]
  52. J. Ramanujam, A. Mathew
    Analysis of Event Synchronization in Parallel Programs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1994, pp:300-315 [Conf]
  53. Ashwath Thirumalai, J. Ramanujam
    Fast Address Sequence Generation for Data-Parallel Programs Using Integer Lattices. [Citation Graph (0, 0)][DBLP]
    LCPC, 1995, pp:191-208 [Conf]
  54. Arun Venkatachar, J. Ramanujam, Ashwath Thirumalai
    Generalized Overlap Regions for Communication Optimization in Data-Parallel Programs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1996, pp:404-419 [Conf]
  55. J. Ramanujam, Swaroop Dutta, Arun Venkatachar
    Code Generation for Complex Subscripts in Data-Parallel Programs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1997, pp:49-63 [Conf]
  56. Xiaoyang Gao, Sriram Krishnamoorthy, Swarup Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan
    Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:215-229 [Conf]
  57. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    Improving Locality in Out-of-Core Computations Using Data Layout Transformations. [Citation Graph (0, 0)][DBLP]
    LCR, 1998, pp:359-366 [Conf]
  58. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam
    Morphable Cache Architectures: Potential Benefits. [Citation Graph (0, 0)][DBLP]
    LCTES/OM, 2001, pp:128-137 [Conf]
  59. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Improving Locality Using Loop and Data Transformations in an Integrated Framework. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:285-297 [Conf]
  60. Daniel Cociorva, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, Marcel Nooijen, David E. Bernholdt, Robert J. Harrison
    Space-Time Trade-Off Optimization for a Class of Electronic Structure Calculations. [Citation Graph (0, 0)][DBLP]
    PLDI, 2002, pp:177-186 [Conf]
  61. Xiaoyang Gao, Swarup Kumar Sahoo, Chi-Chung Lam, J. Ramanujam, Qingda Lu, Gerald Baumgartner, P. Sadayappan
    Performance modeling and optimization of parallel out-of-core tensor contractions. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:266-276 [Conf]
  62. Uday Bondhugula, J. Ramanujam, P. Sadayappan
    Automatic mapping of nested loops to FPGAS. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2007, pp:101-111 [Conf]
  63. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays. [Citation Graph (0, 0)][DBLP]
    PPSC, 1999, pp:- [Conf]
  64. J. Ramanujam
    A Linear Algebraic View of Loop Transformations and Their Interaction. [Citation Graph (0, 0)][DBLP]
    PPSC, 1991, pp:543-548 [Conf]
  65. J. Ramanujam, Amit Narayan
    Integrating Data Distribution and Loop Transformations. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:668-673 [Conf]
  66. Gerald Baumgartner, David E. Bernholdt, Daniel Cociorva, Robert J. Harrison, So Hirata, Chi-Chung Lam, Marcel Nooijen, Russell M. Pitzer, J. Ramanujam, P. Sadayappan
    A high-level approach to synthesis of high-performance codes for quantum chemistry. [Citation Graph (0, 0)][DBLP]
    SC, 2002, pp:1-10 [Conf]
  67. J. Ramanujam
    Non-Unimodular Transformations of Nested Loops. [Citation Graph (0, 0)][DBLP]
    SC, 1992, pp:214-223 [Conf]
  68. J. Ramanujam, P. Sadayappan
    Tiling multidimensional iteration spaces for nonshared memory machines. [Citation Graph (0, 0)][DBLP]
    SC, 1991, pp:111-120 [Conf]
  69. N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary
    Strategies for Improving Data Locality in Embedded Applications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:631-0 [Conf]
  70. J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir
    A Heuristic for Clock Selection in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:414-419 [Conf]
  71. J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir
    Address Code and Arithmetic Optimizations for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:619-624 [Conf]
  72. P. Sadayappan, Fikret Erçal, J. Ramanujam
    Partitioning Graphs on Message-Passing Machines by Pairwise Mincut. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1998, v:111, n:1-4, pp:223-237 [Journal]
  73. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    Locality Optimization Algorithms for Compilation of Out-of-Core Codes. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1998, v:14, n:1, pp:107-138 [Journal]
  74. Rajesh Bordawekar, Alok N. Choudhary, J. Ramanujam
    Compilation and Communication Strategies for Out-of-Core Programs on Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:38, n:2, pp:277-288 [Journal]
  75. Fikret Erçal, J. Ramanujam, P. Sadayappan
    Task Allocation onto a Hypercube by Recursive Mincut Bipartitioning. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1990, v:10, n:1, pp:35-44 [Journal]
  76. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    A Matrix-Based Approach to Global Locality Optimization. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1999, v:58, n:2, pp:190-235 [Journal]
  77. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed-Memory Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2000, v:60, n:8, pp:924-965 [Journal]
  78. J. Ramanujam, P. Sadayappan
    Tiling Multidimensional Itertion Spaces for Multicomputers. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1992, v:16, n:2, pp:108-120 [Journal]
  79. Ashwath Thirumalai, J. Ramanujam
    Efficient Computation of Address Sequences in Data Parallel Programs Using Closed Forms for Basis Vectors. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:38, n:2, pp:188-203 [Journal]
  80. Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Chi-Chung Lam, J. Ramanujam, P. Sadayappan, Venkatesh Choppella
    Efficient synthesis of out-of-core algorithms using a nonlinear optimization solver. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2006, v:66, n:5, pp:659-673 [Journal]
  81. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Rajesh Bordawekar
    Compilation Techniques for Out-of-Core Parallel Computations. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1998, v:24, n:3-4, pp:597-628 [Journal]
  82. P. Sadayappan, Fikret Erçal, J. Ramanujam
    Cluster partitioning approaches to mapping parallel programs onto a hypercube. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1990, v:13, n:1, pp:1-16 [Journal]
  83. Arun Venkatachar, J. Ramanujam, Ashwath Thirumalai
    Communication Generation for Block-Cyclic Distributions. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1997, v:7, n:2, pp:195-202 [Journal]
  84. Mahmut T. Kandemir, J. Ramanujam
    Data Relation Vectors: A New Abstraction for Data Optimizations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:8, pp:798-810 [Journal]
  85. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
    Improving Cache Locality by a Combination of Loop and Data Transformation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:159-167 [Journal]
  86. Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
    A Layout-Conscious Iteration Space Transformation Technique. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:12, pp:1321-1336 [Journal]
  87. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
    A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:243-260 [Journal]
  88. Siddharth Rele, Vipin Jain, Santosh Pande, J. Ramanujam
    Compact and efficient code generation through program restructuringon limited memory embedded DSPs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:4, pp:477-494 [Journal]
  89. Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam
    Reducing code size through address register assignment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:1, pp:225-258 [Journal]
  90. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam
    An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2002, v:21, n:3, pp:257-284 [Journal]
  91. Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer
    Improving the energy behavior of block buffering using compiler optimizations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:228-250 [Journal]
  92. M. Narasimhan, J. Ramanujam
    A fast approach to computing exact solutions to the resource-constrained scheduling problem. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:4, pp:490-500 [Journal]
  93. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Nagaraj Shenoy
    A global communication optimization technique based on data-flow analysis and linear algebra. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1999, v:21, n:6, pp:1251-1297 [Journal]
  94. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
    Static and Dynamic Locality Optimizations Using Integer Linear Programming. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:9, pp:922-941 [Journal]
  95. Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, Nagaraj Shenoy
    Minimizing Data and Synchronization Costs in One-Way Communication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:12, pp:1232-1251 [Journal]
  96. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
    Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2003, v:14, n:4, pp:337-354 [Journal]
  97. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
    A Unified Framework for Optimizing Locality, Parallelism, and Communication in Out-of-Core Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2000, v:11, n:7, pp:648-668 [Journal]
  98. Mahmut T. Kandemir, Alok N. Choudhary, Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
    A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:2, pp:115-135 [Journal]
  99. J. Ramanujam, P. Sadayappan
    Compile-Time Techniques for Data Distribution in Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1991, v:2, n:4, pp:472-482 [Journal]
  100. Rajeev Thakur, Alok N. Choudhary, J. Ramanujam
    Efficient Algorithms for Array Redistribution. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:6, pp:587-594 [Journal]
  101. Jinpyo Hong, J. Ramanujam
    Memory Offset Assignment for DSPs. [Citation Graph (0, 0)][DBLP]
    ICESS, 2007, pp:80-87 [Conf]
  102. Hassan Salamy, J. Ramanujam
    An Effective Heuristic for Simple Offset Assignment with Variable Coalescing. [Citation Graph (0, 0)][DBLP]
    LCPC, 2006, pp:158-172 [Conf]
  103. Sriram Krishnamoorthy, Muthu Baskaran, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan
    Effective automatic parallelization of stencil computations. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:235-244 [Conf]
  104. Sai Pinnepalli, Jinpyo Hong, J. Ramanujam, Doris L. Carver
    Code Size Optimization for Embedded Processors using Commutative Transformations. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2007, pp:409-416 [Conf]

  105. Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors. [Citation Graph (, )][DBLP]


  106. Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model. [Citation Graph (, )][DBLP]


  107. Automatic C-to-CUDA Code Generation for Affine Programs. [Citation Graph (, )][DBLP]


  108. Parameterized tiling revisited. [Citation Graph (, )][DBLP]


  109. Optimal address register allocation for arrays in DSP applications. [Citation Graph (, )][DBLP]


  110. Storage optimization through code size reduction for digital signal processors. [Citation Graph (, )][DBLP]


  111. A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip. [Citation Graph (, )][DBLP]


  112. Parametric multi-level tiling of imperfectly nested loops. [Citation Graph (, )][DBLP]


  113. A compiler framework for optimization of affine loop nests for gpgpus. [Citation Graph (, )][DBLP]


  114. Towards effective automatic parallelization for multicore systems. [Citation Graph (, )][DBLP]


  115. A practical automatic polyhedral parallelizer and locality optimizer. [Citation Graph (, )][DBLP]


  116. Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories. [Citation Graph (, )][DBLP]


  117. Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors. [Citation Graph (, )][DBLP]


  118. Efficient search-space pruning for integrated fusion and tiling transformations. [Citation Graph (, )][DBLP]


Search in 0.008secs, Finished in 0.464secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002