The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Daniel Mlynek: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Marc Epalza, Paolo Ienne, Daniel Mlynek
    Adding Limited Reconfigurability to Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2004, pp:53-62 [Conf]
  2. Marc Epalza, Paolo Ienne, Daniel Mlynek
    Dynamic Reallocation of Functional Units in Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:185-198 [Conf]
  3. Stephanie Dogimont, M. Gumm, Friederich Mombers, Daniel Mlynek, A. Torielli
    Conception and design of a RISC CPU for the use as embedded controller within a parallel multimedia architecture. [Citation Graph (0, 0)][DBLP]
    ASAP, 1997, pp:412-421 [Conf]
  4. Marco Mattavelli, Sylvain Brunetton, Daniel Mlynek
    Computational Graceful Degradation for Video Sequence Decoding. [Citation Graph (0, 0)][DBLP]
    ICIP (1), 1997, pp:330-333 [Conf]
  5. Marco Mattavelli, Sylvain Brunetton, Daniel Mlynek
    A Parallel Multimedia Processor for Macroblock Based Compression Standards. [Citation Graph (0, 0)][DBLP]
    ICIP (2), 1997, pp:570-573 [Conf]
  6. Hans Peter Amann, Philippe Moeschler, Fausto Pellandini, Alain Vachoux, Charles Munk, Daniel Mlynek
    High-Level Specification of Behavioural Hardware Models with MODES. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:387-390 [Conf]
  7. Philippe Duc, Didier Nicoulaz, Daniel Mlynek
    A RISC Controller with Customisation Facility for Flexible System Integration. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:251-254 [Conf]
  8. Friederich Mombers, Daniel Mlynek
    A multithreaded multimedia processor merging on-chip multiprocessors and distributed vector pipelines. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:287-290 [Conf]
  9. Laurent Lemaitre, Marek J. Patyra, Daniel Mlynek
    Synthesis and Design Automation of Analog Fuzzy Logic VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1993, pp:74-79 [Conf]
  10. Anatoly Prihozhy, Daniel Mlynek, Michail Solomennik, Marco Mattavelli
    Techniques for Optimization of Net Algorithms. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2002, pp:211-216 [Conf]
  11. Anatoly Prihozhy, Daniel Mlynek
    Design of Parallel Implementations by Means of Abstract Dynamic Critical Path Based Profiling of Complex Sequential Algorithms. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:1-11 [Conf]
  12. Anatoly Prihozhy, Marco Mattavelli, Daniel Mlynek
    Data Dependences Critical Path Evaluation at C/C++ System Level Description. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:569-579 [Conf]
  13. Anatoly Prihozhy, Marco Mattavelli, Daniel Mlynek
    Evaluation of the Parallelization Potential for Efficient Multimedia Implementations: Dynamic Evaluation of Algorithm Critical Path. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:5, pp:593-608 [Journal]

Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002