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David Gregg :
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M. Anton Ertl , David Gregg Retargeting JIT Compilers by using C-Compiler Generated Executable Code. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2004, pp:41-50 [Conf ] M. Anton Ertl , David Gregg Building an Interpreter with Vmgen. [Citation Graph (0, 0)][DBLP ] CC, 2002, pp:5-8 [Conf ] David Gregg Global Software Pipelining with Iteration Preselection. [Citation Graph (0, 0)][DBLP ] CC, 2000, pp:189-201 [Conf ] David Gregg Comparing Tail Duplication with Compensation Code in Single Path Global Instruction Scheduling. [Citation Graph (0, 0)][DBLP ] CC, 2001, pp:200-212 [Conf ] Kevin Casey , David Gregg , M. Anton Ertl Tiger - An Interpreter Generation Tool. [Citation Graph (0, 0)][DBLP ] CC, 2005, pp:246-249 [Conf ] Emre Özer , Andy Nisbet , David Gregg Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors. [Citation Graph (0, 0)][DBLP ] CC, 2004, pp:250-264 [Conf ] David Gregg , M. Anton Ertl A Language and Tool for Generating Efficient Virtual Machine Interpreters. [Citation Graph (0, 0)][DBLP ] Domain-Specific Program Generation, 2003, pp:196-215 [Conf ] Libero Ficocelli , David Gregg B.Sc. Computer Game Development ... Why not? [Citation Graph (0, 0)][DBLP ] DIGRA Conf., 2005, pp:- [Conf ] M. Anton Ertl , David Gregg The Behavior of Efficient Virtual Machine Interpreters on Modern Architectures. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2001, pp:403-412 [Conf ] Emre Özer , Andy Nisbet , David Gregg Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2004, pp:318-327 [Conf ] Emre Özer , Andy Nisbet , David Gregg Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs. [Citation Graph (0, 0)][DBLP ] FCCM, 2004, pp:273-274 [Conf ] Milan Tichý , Andy Nisbet , David Gregg GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. [Citation Graph (0, 0)][DBLP ] FPGA, 2006, pp:236- [Conf ] David Gregg , M. Anton Ertl , Andreas Krall Implementing an Efficient Java Interpreter. [Citation Graph (0, 0)][DBLP ] HPCN Europe, 2001, pp:613-620 [Conf ] John Waldron , David Gregg Identification and Quantification of Hotspots in Java Grande Programs. [Citation Graph (0, 0)][DBLP ] HPCN Europe, 2001, pp:701-710 [Conf ] Owen Callanan , Andy Nisbet , Emre Özer , James Sexton , David Gregg FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic. [Citation Graph (0, 0)][DBLP ] IPDPS, 2005, pp:- [Conf ] Yunhe Shi , Emre Özer , David Gregg Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors. [Citation Graph (0, 0)][DBLP ] ISCIS, 2006, pp:248-257 [Conf ] Emre Özer , Resit Sendag , David Gregg Multiple-Valued Caches for Power-Efficient Embedded Systems. [Citation Graph (0, 0)][DBLP ] ISMVL, 2005, pp:126-131 [Conf ] David Gregg , James F. Power , John Waldron Measuring the impact of object-oriented techniques in grande applications: a method-level analysis. [Citation Graph (0, 0)][DBLP ] Java Grande, 2002, pp:229- [Conf ] M. Anton Ertl , Kevin Casey , David Gregg Fast and flexible instruction selection with on-demand tree-parsing automata. [Citation Graph (0, 0)][DBLP ] PLDI, 2006, pp:52-60 [Conf ] M. Anton Ertl , David Gregg Optimizing indirect branch prediction accuracy in virtual machine interpreters. [Citation Graph (0, 0)][DBLP ] PLDI, 2003, pp:278-288 [Conf ] Andrew Beatty , Kevin Casey , David Gregg , Andrew Nisbet An Optimized Java Interpreter for Connected Devices and Embedded Systems. [Citation Graph (0, 0)][DBLP ] SAC, 2003, pp:692-697 [Conf ] Kevin Casey , David Gregg , M. Anton Ertl , Andrew Nisbet Towards Superinstructions for Java Interpreters. [Citation Graph (0, 0)][DBLP ] SCOPES, 2003, pp:329-343 [Conf ] Yunhe Shi , David Gregg , Andrew Beatty , M. Anton Ertl Virtual machine showdown: stack versus registers. [Citation Graph (0, 0)][DBLP ] VEE, 2005, pp:153-163 [Conf ] David Gregg , M. Anton Ertl Optimizing code-copying JIT compilers for virtual stack machines. [Citation Graph (0, 0)][DBLP ] Concurrency and Computation: Practice and Experience, 2006, v:18, n:11, pp:1465-1484 [Journal ] David Gregg , James F. Power , John Waldron Platform independent dynamic Java virtual machine analysis: the Java Grande Forum benchmark suite. [Citation Graph (0, 0)][DBLP ] Concurrency and Computation: Practice and Experience, 2003, v:15, n:3-5, pp:459-484 [Journal ] David Gregg , James F. Power , John Waldron A method-level comparison of the Java Grande and SPEC JVM98 benchmark suites. [Citation Graph (0, 0)][DBLP ] Concurrency - Practice and Experience, 2005, v:17, n:7-8, pp:757-773 [Journal ] M. Anton Ertl , David Gregg The Structure and Performance of Efficient Interpreters. [Citation Graph (0, 0)][DBLP ] J. Instruction-Level Parallelism, 2003, v:5, n:, pp:- [Journal ] David Gregg , Andrew Beatty , Kevin Casey , Brian Davis , Andy Nisbet The case for virtual register machines. [Citation Graph (0, 0)][DBLP ] Sci. Comput. Program., 2005, v:57, n:3, pp:319-338 [Journal ] M. Anton Ertl , David Gregg , Andreas Krall , Bernd Paysan Vmgen - a generator of efficient virtual machine interpreters. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 2002, v:32, n:3, pp:265-294 [Journal ] Owen Callanan , David Gregg , Andy Nisbet , Mike Peardon High Performance Scientific Computing Using FPGAs with IEEE Floating Point and Logarithmic Arithmetic for Lattice QCD. [Citation Graph (0, 0)][DBLP ] FPL, 2006, pp:1-6 [Conf ] Milan Tichý , Jan Schier , David Gregg Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA. [Citation Graph (0, 0)][DBLP ] ARC, 2006, pp:311-316 [Conf ] Kevin Casey , M. Anton Ertl , David Gregg Optimizing indirect branch prediction accuracy in virtual machine interpreters. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 2007, v:29, n:6, pp:- [Journal ] Optimization strategies for a java virtual machine interpreter on the cell broadband engine. [Citation Graph (, )][DBLP ] Dynamic interpretation for dynamic scripting languages. [Citation Graph (, )][DBLP ] FPGA based Sparse Matrix Vector Multiplication using Commodity DRAM Memory. [Citation Graph (, )][DBLP ] Streamlining Offload Computing to High Performance Architectures. [Citation Graph (, )][DBLP ] Portable Just-in-Time Specialization of Dynamically Typed Scripting Languages. [Citation Graph (, )][DBLP ] Mapping Streaming Languages to General Purpose Processors through Vectorization. [Citation Graph (, )][DBLP ] Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops. [Citation Graph (, )][DBLP ] A practical solution for scripting language compilers. [Citation Graph (, )][DBLP ] Comparing Integer Data Structures for 32 and 64 Bit Keys. [Citation Graph (, )][DBLP ] FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic. [Citation Graph (, )][DBLP ] Search in 0.006secs, Finished in 0.009secs