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José M. García: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Manuel E. Acacio, José González, José M. García, José Duato
    The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:155-164 [Conf]
  2. Manuel E. Acacio, Óscar Cánovas Reverte, José M. García, Pedro E. López-de-Teruel
    An Evaluation of Parallel Computing in PC Clusters with Fast Ethernet. [Citation Graph (0, 0)][DBLP]
    ACPC, 1999, pp:570-571 [Conf]
  3. Lorenzo Fernández, José M. García
    Congestion Control for High Performance Virtual Cut-through Networks. [Citation Graph (0, 0)][DBLP]
    Applied Informatics, 2003, pp:608-614 [Conf]
  4. Alberto Ros, Manuel E. Acacio, José M. García
    An efficient cache design for scalable glueless shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:321-330 [Conf]
  5. Juan M. Cebrian, Juan L. Aragón, José M. García, Stefanos Kaxiras
    Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2007, pp:113-122 [Conf]
  6. Diego Sevilla, José M. García, Antonio Gómez
    Design and Implementation of a Grid-Enabled Component Container for CORBA Lightweight Components. [Citation Graph (0, 0)][DBLP]
    European Across Grids Conference, 2003, pp:59-66 [Conf]
  7. Gregorio Bernabé, José González, José M. García, José Duato
    Memory Conscious 3D Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2002, pp:108-113 [Conf]
  8. José M. García, A. Flores
    A Novel Approach to Improve the Performance of Interconnection Networks with Hot - Spots. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1996, pp:215-222 [Conf]
  9. Lorenzo Fernández, José M. García, Rafael Casado
    On Deadlock Frequency during Dynamic Reconfiguration in NOWs. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2001, pp:630-638 [Conf]
  10. Alberto Ros, Manuel E. Acacio, José M. García
    A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2005, pp:582-591 [Conf]
  11. Diego Sevilla, José M. García, Antonio Gómez
    CORBA Lightweight Components : A Model for Distributed Component-BasedHeterogeneous Computation. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2001, pp:845-854 [Conf]
  12. Juan L. Aragón, José González, José M. García, Antonio González
    Confidence Estimation for Branch Prediction Reversal. [Citation Graph (0, 0)][DBLP]
    HiPC, 2001, pp:214-223 [Conf]
  13. Juan Fernández, José M. García, José Duato
    Performance Evaluation of Real-Time Communication Services on High-Speed LANs under Topology Changes. [Citation Graph (0, 0)][DBLP]
    HiPC, 2001, pp:341-350 [Conf]
  14. José M. García, Kate A. Smith, Sebastián Lozano, Fernando Guerrero
    A Comparison of GRASP and an Exact Method for Solving a Production and Delivery Scheduling Problem. [Citation Graph (0, 0)][DBLP]
    HIS, 2001, pp:431-447 [Conf]
  15. Manuel E. Acacio, José González, José M. García, José Duato
    A New Scalable Directory Architecture for Large-Scale Multiprocessors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2001, pp:97-106 [Conf]
  16. Francisco J. Villa, Manuel E. Acacio, José M. García
    Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture. [Citation Graph (0, 0)][DBLP]
    HPCC, 2005, pp:213-222 [Conf]
  17. José M. García, Sebastián Lozano, Fernando Guerrero, Ignacio Eguia
    A Genetic Algorithm for Solving a Production and Delivery Scheduling Problem with Time Windows. [Citation Graph (0, 0)][DBLP]
    IBERAMIA, 2002, pp:371-380 [Conf]
  18. Francisco J. Villa, Manuel E. Acacio, José M. García
    On the Evaluation of x86 Web Servers Using Simics: Limitations and Trade-Offs. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science, 2004, pp:541-544 [Conf]
  19. Juan L. Aragón, José González, José M. García, Antonio González
    Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:228-233 [Conf]
  20. Diego Sevilla, José M. García, Antonio Gómez
    Design and Implementation Requirements for CORBA Lightweight Components. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2001, pp:213-220 [Conf]
  21. Pedro E. López-de-Teruel, Alberto Ruiz, José M. García
    A Parallel Algorithm for Tracking of Segments in Noisy Edge Images. [Citation Graph (0, 0)][DBLP]
    ICPR, 2000, pp:4807-4811 [Conf]
  22. Juan Piernas, Toni Cortes, José M. García
    DualFS: a new journaling file system without meta-data duplication. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:137-146 [Conf]
  23. Pedro E. López-de-Teruel, Alberto Ruiz, Ginés García-Mateos, José M. García
    Real-Time Extraction of Colored Segments for Robot Visual Navigation. [Citation Graph (0, 0)][DBLP]
    ICVS, 2003, pp:428-437 [Conf]
  24. Manuel E. Acacio, José González, José M. García, José Duato
    A Novel Approach to Reduce L2 Miss Latency in Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  25. Joaquin Fernández, José M. García, José Duato
    A New Approach to Provide Real-Time Services on High-Speed Local Area Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2001, pp:124- [Conf]
  26. Pedro E. López-de-Teruel, José M. García, Manuel E. Acacio, Óscar Cánovas Reverte
    P-EDR: An Algorithm for Parallel Implementation of Parzen Density Estimation from Uncertain Observations. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:563-568 [Conf]
  27. José L. Sánchez, José M. García, Francisco José Alfaro
    Reconfigurable Wormhole Networks: A Realistic Approach. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:428-437 [Conf]
  28. Pablo Cortés, Fernando Guerrero, David Canca, José M. García
    An Evolutionary Algorithm for the Design of Hybrid Fiber Optic-Coaxial Cable Networks in Small Urban Areas. [Citation Graph (0, 0)][DBLP]
    IWANN (1), 2001, pp:749-756 [Conf]
  29. Diego Sevilla, José M. García, Antonio Gómez
    CORBA Lightweight Compontents: An Early Report. [Citation Graph (0, 0)][DBLP]
    JISBD, 2001, pp:69-84 [Conf]
  30. Diego Sevilla, José A. Pérez, José M. García, Antonio Gómez
    Grid-aware Component-based development in CORBA Lightweight Components. [Citation Graph (0, 0)][DBLP]
    JISBD, 2003, pp:25-34 [Conf]
  31. J. Fernández, José M. García, José Duato
    Improving the Performance of Real-Time Communication Services on High-Speed LANs under Topology Changes. [Citation Graph (0, 0)][DBLP]
    LCN, 2002, pp:385-394 [Conf]
  32. A. Flores, José M. García
    Improving the Performance of Scientific Parallel Applications in a Cluster of Workstations. [Citation Graph (0, 0)][DBLP]
    PARA, 1998, pp:134-141 [Conf]
  33. José M. García, José L. Sánchez, Pascual González
    PEPE: A Trace-Driven Simulator to Evaluate Reconfigurable Multicomputer Architectures. [Citation Graph (0, 0)][DBLP]
    PARA, 1996, pp:302-311 [Conf]
  34. José L. Sánchez, José M. García, Joaquin Fernández
    Improving the Performance of Parallel Triangularization of a Sparse Matrix Using a Reconfigurable Multicomputer. [Citation Graph (0, 0)][DBLP]
    PARA, 1995, pp:493-502 [Conf]
  35. Manuel E. Acacio, José González, José M. García, José Duato
    Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration. [Citation Graph (0, 0)][DBLP]
    PDP, 2002, pp:368-375 [Conf]
  36. Gregorio Bernabé, José M. García, José González
    Reducing 3D Wavelet Transform Execution Time through the Streaming SIMD Extensions. [Citation Graph (0, 0)][DBLP]
    PDP, 2003, pp:49-56 [Conf]
  37. Ricardo Fernández, José M. García, Gregorio Bernabé, Manuel E. Acacio
    Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures. [Citation Graph (0, 0)][DBLP]
    PDP, 2005, pp:76-83 [Conf]
  38. Manuel E. Acacio, José M. García, Pedro E. López-de-Teruel
    A Performance Evaluation of P-EDR in Different Parallel Environments. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:744-750 [Conf]
  39. Manuel E. Acacio, Pedro E. López-de-Teruel, José M. García, Óscar Cánovas Reverte
    The MPI-Delphi Interface: A Visual Programming Environment for Clusters of Workstations. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:1730-1736 [Conf]
  40. Pedro E. López-de-Teruel, José M. García, Manuel E. Acacio
    The Parallel EM Algorithm and its Applications in Computer Vision. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:571-578 [Conf]
  41. José A. Gallud, José M. García, Jesús D. García-Consuegra
    Cluster Computing Using MPI and Windows NT to Solve the Processing of Remotely Sensed Imagery. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 1999, pp:442-449 [Conf]
  42. José A. Gallud, Jesús D. García-Consuegra, José M. García, Luis Orozco-Barbosa
    Evaluating the DIPORSI Framework: Distributed Processing of Remotely Sensed Imagery. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2001, pp:401-409 [Conf]
  43. Pablo E. García, Juan Fernández, Fabrizio Petrini, José M. García
    Assessing MPI Performance on QsNetII. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2005, pp:399-406 [Conf]
  44. Juan Piernas, A. Flores, José M. García
    Analyzing the Performance of MPI in a Cluster of Workstations Based on Fast Ethernet. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 1997, pp:17-24 [Conf]
  45. Manuel E. Acacio, José González, José M. García, José Duato
    Owner prediction for accelerating cache-to-cache transfer misses in a cc-NUMA architecture. [Citation Graph (0, 0)][DBLP]
    SC, 2002, pp:1-12 [Conf]
  46. Pablo Cortés, Juan Larrañeta, Luis Onieva, José M. García, María S. Caraballo
    Genetic algorithm for planning cable telecommunication networks. [Citation Graph (0, 0)][DBLP]
    Appl. Soft Comput., 2001, v:1, n:1, pp:21-33 [Journal]
  47. Manuel E. Acacio, Óscar Cánovas Reverte, José M. García, Pedro E. López-de-Teruel
    MPI-Delphi: an MPI implementation for visual programming environments and heterogeneous computing. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 2002, v:18, n:3, pp:317-333 [Journal]
  48. Gregorio Bernabé, Ricardo Fernández, José M. García, Manuel E. Acacio, José González
    An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2007, v:33, n:1, pp:54-72 [Journal]
  49. José A. Gallud, José M. García
    The Specification of a Generic Multicomputer Using Lotos. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1995, v:30, n:2, pp:21-24 [Journal]
  50. Juan Piernas, Toni Cortes, José M. García
    The Design of New Journaling File Systems: The DualFS Case. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:2, pp:267-281 [Journal]
  51. Manuel E. Acacio, José González, José M. García, José Duato
    An Architecture for High-Performance Scalable Shared-Memory Multiprocessors Exploiting On-Chip Integration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:8, pp:755-768 [Journal]
  52. Manuel E. Acacio, José González, José M. García, José Duato
    A Two-Level Directory Architecture for Highly Scalable cc-NUMA Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:1, pp:67-79 [Journal]
  53. Juan M. Cebrian, Juan L. Aragón, José M. García
    Leakage Energy Reduction in Value Predictors through Static Decay. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-7 [Conf]
  54. Diego Sevilla, José M. García, Antonio Gómez
    Aspect-Oriented Programing Techniques to support Distribution, Fault Tolerance, and Load Balancing in the CORBA-LC Component Model. [Citation Graph (0, 0)][DBLP]
    NCA, 2007, pp:195-204 [Conf]
  55. Francisco J. Villa, Manuel E. Acacio, José M. García
    On the Evaluation of Dense Chip-Multiprocessor Architectures. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2006, pp:21-27 [Conf]

  56. Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs. [Citation Graph (, )][DBLP]


  57. Scalable Directory Organization for Tiled CMP Architectures. [Citation Graph (, )][DBLP]


  58. A fault-tolerant directory-based cache coherence protocol for CMP architectures. [Citation Graph (, )][DBLP]


  59. REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs. [Citation Graph (, )][DBLP]


  60. Directory-Based Conflict Detection in Hardware Transactional Memory. [Citation Graph (, )][DBLP]


  61. Distance-aware round-robin mapping for large NUCA caches. [Citation Graph (, )][DBLP]


  62. Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors. [Citation Graph (, )][DBLP]


  63. Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs. [Citation Graph (, )][DBLP]


  64. A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures. [Citation Graph (, )][DBLP]


  65. Viral System to Solve Optimization Problems: An Immune-Inspired Computational Intelligence Approach. [Citation Graph (, )][DBLP]


  66. DiCo-CMP: Efficient cache coherency in tiled CMP architectures. [Citation Graph (, )][DBLP]


  67. Efficient microarchitecture policies for accurately adapting to power constraints. [Citation Graph (, )][DBLP]


  68. Extending SRT for parallel applications in tiled-CMP architectures. [Citation Graph (, )][DBLP]


  69. Implementing P Systems Parallelism by Means of GPUs. [Citation Graph (, )][DBLP]


  70. Using AOP to Automatically Provide Distribution, Fault Tolerance, and Load Balancing to the CORBA-LC Component Model. [Citation Graph (, )][DBLP]


  71. An algorithm for dynamic reconfiguration of a multicomputer network. [Citation Graph (, )][DBLP]


  72. Automatic Code Generation for Non-Funtional Aspects in the CORBA-LC Component Model. [Citation Graph (, )][DBLP]


  73. Simulation of P systems with active membranes on CUDA. [Citation Graph (, )][DBLP]


  74. Viral systems: A new bio-inspired optimisation approach. [Citation Graph (, )][DBLP]


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