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Jean-Loup Baer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. James K. Archibald, Jean-Loup Baer
    Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model. [Citation Graph (8, 0)][DBLP]
    ACM Trans. Comput. Syst., 1986, v:4, n:4, pp:273-298 [Journal]
  2. Sai Choi Kwan, Jean-Loup Baer
    The I/O Performance of Multiway Mergesort and Tag Sort. [Citation Graph (5, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:4, pp:383-387 [Journal]
  3. Jean-Loup Baer, Yi-Bing Lin
    Improving Quicksort Performance with a Codewort Data Structure. [Citation Graph (3, 0)][DBLP]
    IEEE Trans. Software Eng., 1989, v:15, n:5, pp:622-631 [Journal]
  4. Jean-Loup Baer, Gary R. Sager
    Dynamic Improvement of Locality in Virtual Memory Systems. [Citation Graph (3, 0)][DBLP]
    IEEE Trans. Software Eng., 1976, v:2, n:1, pp:54-62 [Journal]
  5. Tien-Fu Chen, Jean-Loup Baer
    Reducing Memory Latency via Non-blocking and Prefetching Caches. [Citation Graph (2, 0)][DBLP]
    ASPLOS, 1992, pp:51-61 [Conf]
  6. Jean-Loup Baer, Carla Schlatter Ellis
    Model, Design, and Evaluation of a Compiler for a Parallel Processing Environment. [Citation Graph (2, 0)][DBLP]
    IEEE Trans. Software Eng., 1977, v:3, n:6, pp:394-405 [Journal]
  7. Theodore H. Romer, Dennis Lee, Geoffrey M. Voelker, Alec Wolman, Wayne A. Wong, Jean-Loup Baer, Brian N. Bershad, Henry M. Levy
    The Structure and Performance of Interpreters. [Citation Graph (1, 0)][DBLP]
    ASPLOS, 1996, pp:150-159 [Conf]
  8. Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal Sidhwaney
    Memory Hierarchy Design for a Multiprocessor Look-up Engine. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:206-0 [Conf]
  9. Daniel Ortega, Eduard Ayguadé, Jean-Loup Baer, Mateo Valero
    Cost-Effective Compiler Directed Memory Prefetching and Bypassing. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:189-198 [Conf]
  10. Jean-Loup Baer
    Modelling Architectural Features with Petri Nets. [Citation Graph (0, 0)][DBLP]
    Advances in Petri Nets, 1986, pp:258-277 [Conf]
  11. Xiaohan Qin, Jean-Loup Baer
    A comparative study of conservative and optimistic trace-driven simulations. [Citation Graph (0, 0)][DBLP]
    Annual Simulation Symposium, 1995, pp:42-50 [Conf]
  12. Jean-Loup Baer, Tien-Fu Chen
    An Evaluation of Hardware and Software Data Prefetching. [Citation Graph (0, 0)][DBLP]
    Applications in Parallel and Distributed Computing, 1994, pp:257-266 [Conf]
  13. Jean-Loup Baer, Meei-Chiueh Liem, Larry McMurchie, Rudolf Nottrott, Lawrence Snyder, Wayne Winder
    A Notation for Describing Multiple Views of VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:102-107 [Conf]
  14. Richard N. Zucker, Jean-Loup Baer
    Software versus Hardware Coherence: Performance versus Cos. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:163-172 [Conf]
  15. Craig Anderson, Jean-Loup Baer
    Two Techniques for Improving Performance on Bus-Based Multiprocessors. [Citation Graph (0, 0)][DBLP]
    HPCA, 1995, pp:264-275 [Conf]
  16. Xiaohan Qin, Jean-Loup Baer
    On the Use and Performance of Explicit Communication Primitives in Cache-Coherent Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    HPCA, 1997, pp:182-193 [Conf]
  17. Wayne A. Wong, Jean-Loup Baer
    Modified LRU Policies for Improving Second-Level Cache Behavior. [Citation Graph (0, 0)][DBLP]
    HPCA, 2000, pp:49-60 [Conf]
  18. Peter van Vleet, Eric J. Anderson, Lindsay Brown, Jean-Loup Baer, Anna R. Karlin
    Pursuing the Performance Potential of Dynamic Cache Line Sizes. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:528-537 [Conf]
  19. Jean-Loup Baer, Wen-Hann Wang
    Architectural Choices for Multi-level Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:258-261 [Conf]
  20. Jean-Loup Baer, Richard N. Zucker
    On Synchronization Patterns in Parallel Programs. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1991, pp:60-67 [Conf]
  21. Hung-Chang Du, Jean-Loup Baer
    On the Performance of Interleaved Memories with Non-Uniform Access Probabilities. [Citation Graph (0, 0)][DBLP]
    ICPP, 1983, pp:429-436 [Conf]
  22. Sai Choi Kwan, Jean-Loup Baer, G. Zick, T. Snyder
    Parallel Tag-Distribution Sort. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:854-861 [Conf]
  23. Haim E. Mizrahi, Jean-Loup Baer, Edward D. Lazowska, John Zahorjan
    Extending the Memory Hierarchy into Multiprocessor Interconnection Networks: A Performance Analysis. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1989, pp:41-50 [Conf]
  24. Sang Lyul Min, Jean-Loup Baer
    A Timestamp-based Cache Coherence Scheme. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1989, pp:23-32 [Conf]
  25. Sang Lyul Min, Jean-Loup Baer
    A Performance Comparison of Directory-based and Timestamp-based Cache Coherence Schemes. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:305-311 [Conf]
  26. Xiaohan Qin, Jean-Loup Baer
    A Parallel Trace-driven Simulator: Implementation and Performance. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:314-318 [Conf]
  27. Patrick Crowley, Marc E. Fiuczynski, Jean-Loup Baer, Brian N. Bershad
    Characterizing processor architectures for programmable network interfaces. [Citation Graph (0, 0)][DBLP]
    ICS, 2000, pp:54-65 [Conf]
  28. Sang Lyul Min, Jean-Loup Baer, Hyoung-Joo Kim
    An efficient caching support for critical sections in large-scale shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICS, 1990, pp:34-47 [Conf]
  29. Jean-Loup Baer, Georges Gardarin, Claude Girault, Gérard Roucairol
    The Two-Step Commitment Protocol: Modeling, Specification and Proof Methodology. [Citation Graph (0, 0)][DBLP]
    ICSE, 1981, pp:363-373 [Conf]
  30. Jean-Loup Baer, Daniel P. Bovet
    Compilation of arithmetic expressions for parallel computations. [Citation Graph (0, 0)][DBLP]
    IFIP Congress (1), 1968, pp:340-346 [Conf]
  31. Jean-Loup Baer, M. Fries
    On the Efficiency of Some List Marketing Algorithms. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1977, pp:751-756 [Conf]
  32. Craig Anderson, Jean-Loup Baer
    A Multi-Level Hierarchical Cache Coherence Protocol for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IPPS, 1993, pp:142-148 [Conf]
  33. Jean-Loup Baer, Wen-Hann Wang
    On the Inclusion Properties for Multi-Level Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    ISCA, 1988, pp:73-80 [Conf]
  34. James K. Archibald, Jean-Loup Baer
    An Economical Solution to the Cache Coherence Problem. [Citation Graph (0, 0)][DBLP]
    ISCA, 1984, pp:355-362 [Conf]
  35. Jean-Loup Baer, Wen-Hann Wang
    Retrospective: On the Inclusion Properties for Multi-Level Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:59-60 [Conf]
  36. Jean-Loup Baer, Wen-Hann Wang
    On the Inclusion Properties for Multi-Level Cache Hierarchies. [Citation Graph (0, 0)][DBLP]
    25 Years ISCA: Retrospectives and Reprints, 1998, pp:345-352 [Conf]
  37. Tien-Fu Chen, Jean-Loup Baer
    A Performance Study of Software and Hardware Data Prefetching Schemes. [Citation Graph (0, 0)][DBLP]
    ISCA, 1994, pp:223-232 [Conf]
  38. John E. Jensen, Jean-Loup Baer
    A Model of Interference in a Shared Resource Multiprocessor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1976, pp:52-57 [Conf]
  39. Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grunwald
    Instruction Cache Fetch Policies for Speculative Execution. [Citation Graph (0, 0)][DBLP]
    ISCA, 1995, pp:357-367 [Conf]
  40. Dennis C. Lee, Patrick Crowley, Jean-Loup Baer, Thomas E. Anderson, Brian N. Bershad
    Execution Characteristics of Desktop Applications on Windows NT. [Citation Graph (0, 0)][DBLP]
    ISCA, 1998, pp:27-38 [Conf]
  41. Haim E. Mizrahi, Jean-Loup Baer, Edward D. Lazowska, John Zahorjan
    Introducing Memory into Switch Elements of Multiprocessor Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 1989, pp:158-166 [Conf]
  42. Wen-Hann Wang, Jean-Loup Baer, Henry M. Levy
    Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy. [Citation Graph (0, 0)][DBLP]
    ISCA, 1989, pp:140-148 [Conf]
  43. Richard N. Zucker, Jean-Loup Baer
    A Performance Study of Memory Consistency Models. [Citation Graph (0, 0)][DBLP]
    ISCA, 1992, pp:2-12 [Conf]
  44. Jean-Loup Baer, John E. Jensen
    Simulation of Large Parallel Systems: Modelling of Tasks. [Citation Graph (0, 0)][DBLP]
    Performance, 1977, pp:53-73 [Conf]
  45. Jean-Loup Baer, Tien-Fu Chen
    An effective on-chip preloading scheme to reduce data access penalty. [Citation Graph (0, 0)][DBLP]
    SC, 1991, pp:176-186 [Conf]
  46. Patrick Crowley, Jean-Loup Baer
    On the Use of Trace Sampling for Architectural Studies of Desktop Applications. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 1999, pp:208-209 [Conf]
  47. Xiaohan Qin, Jean-Loup Baer
    A Performance Evaluation of Cluster-Based Architectures. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 1997, pp:237-247 [Conf]
  48. Wen-Hann Wang, Jean-Loup Baer
    Efficient Trace-Driven Simulation Methods for Cache Performance Analysis. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 1990, pp:27-36 [Conf]
  49. Jean-Loup Baer, B. Schwab
    A Comparison of Tree-Balancing Algorithms. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1977, v:20, n:5, pp:322-330 [Journal]
  50. G. Kampen, Jean-Loup Baer
    The Formal Definition of Semantics by String Automata. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1976, v:1, n:2, pp:121-138 [Journal]
  51. Jean-Loup Baer
    Computer Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1984, v:17, n:10, pp:77-87 [Journal]
  52. Jean-Loup Baer
    A Survey of Some Theoretical Aspects of Multiprocessing. [Citation Graph (0, 0)][DBLP]
    ACM Comput. Surv., 1973, v:5, n:1, pp:31-80 [Journal]
  53. Jean-Loup Baer, Daniel P. Bovet, Gerald Estrin
    Legality and Other Properties of Graph Models of Computations. [Citation Graph (0, 0)][DBLP]
    J. ACM, 1970, v:17, n:3, pp:543-554 [Journal]
  54. Jean-Loup Baer, Wen-Hann Wang
    Multilevel Cache Hierarchies: Organizations, Protocols, and Performance. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1989, v:6, n:3, pp:451-476 [Journal]
  55. Jean-Loup Baer
    Multiprocessing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1976, v:25, n:12, pp:1271-1277 [Journal]
  56. Jean-Loup Baer, Hung-Chang Du, Richard E. Ladner
    Binary Search in a Multiprocessing Environment. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:7, pp:667-677 [Journal]
  57. Jean-Loup Baer, Barbara Koyama
    On the Minimization of the Width of the Control Memory of Microprogammed Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:4, pp:330-316 [Journal]
  58. Tien-Fu Chen, Jean-Loup Baer
    Effective Hardware Based Data Prefetching for High-Performance Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:5, pp:609-623 [Journal]
  59. Wen-Hann Wang, Jean-Loup Baer
    Efficient Trace-Driven Simulation Methods for Cache Performance Analysis. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Comput. Syst., 1991, v:9, n:3, pp:222-241 [Journal]
  60. Sang Lyul Min, Jean-Loup Baer
    Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1992, v:3, n:1, pp:25-44 [Journal]
  61. Jean-Loup Baer, Gary R. Sager
    Correction to "Dynamic Improvement of Locality in Virtual Memory Systems". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1976, v:2, n:2, pp:137- [Journal]

  62. Weight-balanced trees. [Citation Graph (, )][DBLP]


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