|
Search the dblp DataBase
Deniz Balkan:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. [Citation Graph (0, 0)][DBLP] PACT, 2006, pp:265-274 [Conf]
- Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
Adaptive reorder buffers for SMT processors. [Citation Graph (0, 0)][DBLP] PACT, 2006, pp:244-253 [Conf]
- Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose
Increasing Processor Performance Through Early Register Release. [Citation Graph (0, 0)][DBLP] ICCD, 2004, pp:480-487 [Conf]
- Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal
Address-Value Decoupling for Early Register Deallocation. [Citation Graph (0, 0)][DBLP] ICPP, 2006, pp:337-346 [Conf]
- Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
Selective writeback: exploiting transient values for energy-efficiency and performance. [Citation Graph (0, 0)][DBLP] ISLPED, 2006, pp:37-42 [Conf]
- Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. [Citation Graph (0, 0)][DBLP] MICRO, 2004, pp:304-315 [Conf]
- Deniz Balkan, John Kalamatianos, David R. Kaeli
A Study of Errant Pipeline Flushes Caused by Value Misspeculation. [Citation Graph (0, 0)][DBLP] SBAC-PAD, 2004, pp:32-39 [Conf]
- Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
Early Register Deallocation Mechanisms Using Checkpointed Register Files. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2006, v:55, n:9, pp:1153-1166 [Journal]
Search in 0.001secs, Finished in 0.002secs
|