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Mikko H. Lipasti: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gordon B. Bell, Kevin M. Lepak, Mikko H. Lipasti
    Characterization of Silent Stores. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:133-144 [Conf]
  2. Harold W. Cain, Mikko H. Lipasti, Ravi Nair
    Constraint Graph Analysis of Multithreaded Programs. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:4-14 [Conf]
  3. Derek L. Howard, Mikko H. Lipasti
    The Effect of Program Optimization on Trace Cache Efficiency. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:256-261 [Conf]
  4. Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti
    Redeeming IPC as a Performance Metric for Multithreaded Programs. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:232-243 [Conf]
  5. Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
    Minimizing Energy Consumption for High-Performance Processing. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:199-206 [Conf]
  6. Kevin M. Lepak, Mikko H. Lipasti
    Temporally silent stores. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2002, pp:30-41 [Conf]
  7. Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen
    Value Locality and Load Value Prediction. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1996, pp:138-147 [Conf]
  8. Jason F. Cantin, Mikko H. Lipasti, James E. Smith
    Stealth prefetching. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:274-282 [Conf]
  9. Lixin Su, Mikko H. Lipasti
    Dynamic Class Hierarchy Mutation. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:98-110 [Conf]
  10. Mikko H. Lipasti, John Paul Shen
    The Performance Potential of Value and Dependence Prediction. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:1043-1052 [Conf]
  11. Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko H. Lipasti
    An Architectural Evaluation of Java TPC-W. [Citation Graph (0, 0)][DBLP]
    HPCA, 2001, pp:229-240 [Conf]
  12. Ilhyun Kim, Mikko H. Lipasti
    Understanding Scheduling Replay Schemes. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:198-209 [Conf]
  13. Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen
    Can Trace-Driven Simulators Accurately Predict Superscalar Performance? [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:478-485 [Conf]
  14. Trung A. Diep, Mikko H. Lipasti, John Paul Shen
    Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:86-93 [Conf]
  15. Brian R. Mestan, Mikko H. Lipasti
    Exploiting Partial Operand Knowledge. [Citation Graph (0, 0)][DBLP]
    ICPP, 2003, pp:369-378 [Conf]
  16. Harold W. Cain, Mikko H. Lipasti
    Memory Ordering: A Value-Based Approach. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:90-101 [Conf]
  17. Jason F. Cantin, Mikko H. Lipasti, James E. Smith
    Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:246-257 [Conf]
  18. Ilhyun Kim, Mikko H. Lipasti
    Implementing Optimizations at Decode Time. [Citation Graph (0, 0)][DBLP]
    ISCA, 2002, pp:221-232 [Conf]
  19. Ilhyun Kim, Mikko H. Lipasti
    Half-Price Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:28-38 [Conf]
  20. Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black
    Avoiding Initialization Misses to the Heap. [Citation Graph (0, 0)][DBLP]
    ISCA, 2002, pp:183-194 [Conf]
  21. Mikko H. Lipasti, Brian R. Mestan, Erika Gunadi
    Physical Register Inlining. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:325-337 [Conf]
  22. Kevin M. Lepak, Mikko H. Lipasti
    On the value locality of store instructions. [Citation Graph (0, 0)][DBLP]
    ISCA, 2000, pp:182-191 [Conf]
  23. Eric L. Hill, Mikko H. Lipasti
    Stall cycle redistribution in a transparent fetch pipeline. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:31-36 [Conf]
  24. Gordon B. Bell, Mikko H. Lipasti
    Deconstructing commit. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:68-77 [Conf]
  25. Ilhyun Kim, Mikko H. Lipasti
    Macro-op Scheduling: Relaxing Scheduling Loop Constraints. [Citation Graph (0, 0)][DBLP]
    MICRO, 2003, pp:277-290 [Conf]
  26. Kevin M. Lepak, Mikko H. Lipasti
    Silent stores for free. [Citation Graph (0, 0)][DBLP]
    MICRO, 2000, pp:22-31 [Conf]
  27. Mikko H. Lipasti, John Paul Shen
    Exceeding the Dataflow Limit via Value Prediction. [Citation Graph (0, 0)][DBLP]
    MICRO, 1996, pp:226-237 [Conf]
  28. Mikko H. Lipasti, William J. Schmidt, Steven R. Kunkel, Robert R. Roediger
    SPAID: software prefetching in pointer- and call-intensive environments. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:231-236 [Conf]
  29. Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, Mikko H. Lipasti
    Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:328-337 [Conf]
  30. Harold W. Cain, Mikko H. Lipasti
    Verifying sequential consistency using vector clocks. [Citation Graph (0, 0)][DBLP]
    SPAA, 2002, pp:153-154 [Conf]
  31. Jason F. Cantin, Mikko H. Lipasti, James E. Smith
    The complexity of verifying memory coherence. [Citation Graph (0, 0)][DBLP]
    SPAA, 2003, pp:254-255 [Conf]
  32. Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
    Minimizing Energy Consumption for High-Performance Processing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:199-0 [Conf]
  33. Mikko H. Lipasti, John Paul Shen
    Superspeculative Microarchitecture for Beyond AD 2000. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:59-66 [Journal]
  34. Steven R. Kunkel, Richard J. Eickemeyer, Mikko H. Lipasti, Timothy J. Mullins, Brian O'Krafka, Harold Rosenberg, Steven P. Vanderwiel, Philip L. Vitale, Larry D. Whitley
    A performance methodology for commercial servers. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2000, v:44, n:6, pp:851-872 [Journal]
  35. Mikko H. Lipasti, John Paul Shen
    Exploiting Value Locality to Exceed the Dataflow Limit. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 1998, v:26, n:4, pp:505-538 [Journal]
  36. Harold W. Cain, Mikko H. Lipasti, Ravi Nair
    Constraint Graph Analysis of Multithreaded Programs. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2004, v:6, n:, pp:- [Journal]
  37. Harold W. Cain, Mikko H. Lipasti
    Memory Ordering: A Value-Based Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:6, pp:110-117 [Journal]
  38. Jason F. Cantin, James E. Smith, Mikko H. Lipasti, Andreas Moshovos, Babak Falsafi
    Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:1, pp:70-79 [Journal]
  39. Harold W. Cain, Kevin M. Lepak, Mikko H. Lipasti
    A dynamic binary translation approach to architectural simulation. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2001, v:29, n:1, pp:27-36 [Journal]
  40. Kevin M. Lepak, Gordon B. Bell, Mikko H. Lipasti
    Silent Stores and Store Value Locality. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1174-1190 [Journal]
  41. Jason F. Cantin, Mikko H. Lipasti, James E. Smith
    The Complexity of Verifying Memory Coherence and Consistency. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:7, pp:663-671 [Journal]
  42. Lixin Su, Mikko H. Lipasti
    Speculative optimization using hardware-monitored guarded regions for java virtual machines. [Citation Graph (0, 0)][DBLP]
    VEE, 2007, pp:22-32 [Conf]
  43. Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
    Energy Estimation of the Memory Subsystem in Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:3, pp:325-332 [Journal]

  44. Skewed redundancy. [Citation Graph (, )][DBLP]


  45. An accurate flip-flop selection technique for reducing logic SER. [Citation Graph (, )][DBLP]


  46. An approach for implementing efficient superscalar CISC processors. [Citation Graph (, )][DBLP]


  47. Power-Efficient DRAM Speculation. [Citation Graph (, )][DBLP]


  48. A position-insensitive finished store buffer. [Citation Graph (, )][DBLP]


  49. Transparent mode flip-flops for collapsible pipelines. [Citation Graph (, )][DBLP]


  50. Achieving predictable performance through better memory controller placement in many-core CMPs. [Citation Graph (, )][DBLP]


  51. Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support. [Citation Graph (, )][DBLP]


  52. Power-aware operand delivery. [Citation Graph (, )][DBLP]


  53. Friendly fire: understanding the effects of multiprocessor prefetches. [Citation Graph (, )][DBLP]


  54. Reaping the Benefit of Temporal Silence to Improve Communication Performance. [Citation Graph (, )][DBLP]


  55. Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence. [Citation Graph (, )][DBLP]


  56. SCARAB: a single cycle adaptive routing and bufferless network. [Citation Graph (, )][DBLP]


  57. Light speed arbitration and flow control for nanophotonic interconnects. [Citation Graph (, )][DBLP]


  58. Circuit-Switched Coherence. [Citation Graph (, )][DBLP]


  59. Circuit-Switched Coherence. [Citation Graph (, )][DBLP]


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