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Steven K. Reinhardt:
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Publications of Author
- Mark D. Hill, James R. Larus, Steven K. Reinhardt, David A. Wood
Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. [Citation Graph (1, 0)][DBLP] ACM Trans. Comput. Syst., 1993, v:11, n:4, pp:300-318 [Journal]
- Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Ronald G. Dreslinski, Andrew L. Schultz, Steven K. Reinhardt
Performance Analysis of System Overheads in TCP/IP Workloads. [Citation Graph (0, 0)][DBLP] IEEE PACT, 2005, pp:218-230 [Conf]
- Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. [Citation Graph (0, 0)][DBLP] PACT, 2006, pp:13-22 [Conf]
- Steven E. Raasch, Steven K. Reinhardt
The Impact of Resource Partitioning on SMT Processors. [Citation Graph (0, 0)][DBLP] IEEE PACT, 2003, pp:15-26 [Conf]
- Krisztián Flautner, Richard Uhlig, Steven K. Reinhardt, Trevor N. Mudge
Thread Level Parallelism and Interactive Performance of Desktop Applications. [Citation Graph (0, 0)][DBLP] ASPLOS, 2000, pp:129-138 [Conf]
- Mark D. Hill, James R. Larus, Steven K. Reinhardt, David A. Wood
Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. [Citation Graph (0, 0)][DBLP] ASPLOS, 1992, pp:262-273 [Conf]
- Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood
Fine-grain Access Control for Distributed Shared Memory. [Citation Graph (0, 0)][DBLP] ASPLOS, 1994, pp:297-306 [Conf]
- Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhardt
Integrated network interfaces for high-bandwidth TCP/IP. [Citation Graph (0, 0)][DBLP] ASPLOS, 2006, pp:315-324 [Conf]
- Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. [Citation Graph (0, 0)][DBLP] ASPLOS, 2006, pp:117-128 [Conf]
- Ronald G. Dreslinski, Ali G. Saidi, Trevor N. Mudge, Steven K. Reinhardt
Analysis of hardware prefetching across virtual page boundaries. [Citation Graph (0, 0)][DBLP] Conf. Computing Frontiers, 2007, pp:13-22 [Conf]
- Erik G. Hallnor, Steven K. Reinhardt
A Unified Compressed Memory Hierarchy. [Citation Graph (0, 0)][DBLP] HPCA, 2005, pp:201-212 [Conf]
- Shubhendu S. Mukherjee, Joel S. Emer, Steven K. Reinhardt
The Soft Error Problem: An Architectural Perspective. [Citation Graph (0, 0)][DBLP] HPCA, 2005, pp:243-247 [Conf]
- Wi-Fen Lin, Steven K. Reinhardt, Doug Burger
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. [Citation Graph (0, 0)][DBLP] HPCA, 2001, pp:301-312 [Conf]
- Wei-Fen Lin, Steven K. Reinhardt, Doug Burger, Thomas R. Puzak
Filtering Superfluous Prefetches Using Density Vectors. [Citation Graph (0, 0)][DBLP] ICCD, 2001, pp:124-132 [Conf]
- Steven K. Reinhardt
Two Parallel Processing Aspects of the Cray Y-MP Computer System. [Citation Graph (0, 0)][DBLP] ICPP (1), 1988, pp:311-314 [Conf]
- Robert S. Chappell, Jared Stark, Sangwook P. Kim, Steven K. Reinhardt, Yale N. Patt
Simultaneous Subordinate Microthreading (SSMT). [Citation Graph (0, 0)][DBLP] ISCA, 1999, pp:186-195 [Conf]
- Erik G. Hallnor, Steven K. Reinhardt
A fully associative software-managed cache design. [Citation Graph (0, 0)][DBLP] ISCA, 2000, pp:107-116 [Conf]
- Shubhendu S. Mukherjee, Michael Kontz, Steven K. Reinhardt
Detailed Design and Evaluation of Redundant Multithreading Alternatives. [Citation Graph (0, 0)][DBLP] ISCA, 2002, pp:99-110 [Conf]
- Steven E. Raasch, Nathan L. Binkert, Steven K. Reinhardt
A Scalable Instruction Queue Design Using Dependence Chains. [Citation Graph (0, 0)][DBLP] ISCA, 2002, pp:318-0 [Conf]
- Steven K. Reinhardt, James R. Larus, David A. Wood
Tempest and Typhoon: User-Level Shared Memory. [Citation Graph (0, 0)][DBLP] ISCA, 1994, pp:325-336 [Conf]
- Steven K. Reinhardt, James R. Larus, David A. Wood
Retrospective: Tempest and Typhoon: User-Level Shared Memory. [Citation Graph (0, 0)][DBLP] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:98-102 [Conf]
- Steven K. Reinhardt, James R. Larus, David A. Wood
Tempest and Typhoon: User-Level Shared Memory. [Citation Graph (0, 0)][DBLP] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:497-508 [Conf]
- Steven K. Reinhardt, Shubhendu S. Mukherjee
Transient fault detection via simultaneous multithreading. [Citation Graph (0, 0)][DBLP] ISCA, 2000, pp:25-36 [Conf]
- Steven K. Reinhardt, Robert W. Pfile, David A. Wood
Decoupled Hardware Support for Distributed Shared Memory. [Citation Graph (0, 0)][DBLP] ISCA, 1996, pp:34-43 [Conf]
- Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Kathryn S. McKinley, Charles C. Weems
Guided Region Prefetching: A Cooperative Hardware/Software Approach. [Citation Graph (0, 0)][DBLP] ISCA, 2003, pp:388-398 [Conf]
- Christopher Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt
Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] ISCA, 2004, pp:264-275 [Conf]
- David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla, Steven K. Reinhardt
Mechanisms for Cooperative Shared Memory. [Citation Graph (0, 0)][DBLP] ISCA, 1993, pp:156-167 [Conf]
- Shubhendu S. Mukherjee, Christopher Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] MICRO, 2003, pp:29-42 [Conf]
- David W. Oehmke, Nathan L. Binkert, Trevor N. Mudge, Steven K. Reinhardt
How to Fake 1000 Registers. [Citation Graph (0, 0)][DBLP] MICRO, 2005, pp:7-18 [Conf]
- Steven K. Reinhardt, Babak Falsafi, David A. Wood
Kernel Support for the Wisconsin Wind Tunnel. [Citation Graph (0, 0)][DBLP] USENIX Microkernels and Other Kernel Architectures Symposium, 1993, pp:73-90 [Conf]
- Krisztián Flautner, Steven K. Reinhardt, Trevor N. Mudge
Automatic performance setting for dynamic voltage scaling. [Citation Graph (0, 0)][DBLP] MOBICOM, 2001, pp:260-271 [Conf]
- Shubhendu S. Mukherjee, Joel S. Emer, Tryggve Fossum, Steven K. Reinhardt
Cache Scrubbing in Microprocessors: Myth or Necessity? [Citation Graph (0, 0)][DBLP] PRDC, 2004, pp:37-42 [Conf]
- Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas, Mark D. Hill, James R. Larus, Anne Rogers, David A. Wood
Application-specific protocols for user-level shared memory. [Citation Graph (0, 0)][DBLP] SC, 1994, pp:380-389 [Conf]
- Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, David A. Wood
The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. [Citation Graph (0, 0)][DBLP] SIGMETRICS, 1993, pp:48-60 [Conf]
- Steven K. Reinhardt
A Data-Flow Approach to Multitasking ob CRAY X-MP Compputers. [Citation Graph (0, 0)][DBLP] SOSP, 1985, pp:107-114 [Conf]
- Erik G. Hallnor, Steven K. Reinhardt
A compressed memory hierarchy using an indirect index cache. [Citation Graph (0, 0)][DBLP] WMPI, 2004, pp:9-15 [Conf]
- Nathan L. Binkert, Ronald G. Dreslinski, Lisa R. Hsu, Kevin T. Lim, Ali G. Saidi, Steven K. Reinhardt
The M5 Simulator: Modeling Networked Systems. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2006, v:26, n:4, pp:52-60 [Journal]
- Shubhendu S. Mukherjee, Chris Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
Measuring Architectural Vulnerability Factors. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2003, v:23, n:6, pp:70-75 [Journal]
- Christopher Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt
Reducing the Soft-Error Rate of a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:30-37 [Journal]
- Lisa R. Hsu, Ravishankar R. Iyer, Srihari Makineni, Steven K. Reinhardt, Donald Newell
Exploring the cache design space for large scale CMPs. [Citation Graph (0, 0)][DBLP] SIGARCH Computer Architecture News, 2005, v:33, n:4, pp:24-33 [Journal]
- Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
Designing a Modern Memory Hierarchy with Hardware Prefetching. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2001, v:50, n:11, pp:1202-1218 [Journal]
- Steven K. Reinhardt, Robert W. Pfile, David A. Wood
Hardware Support for Flexible Distributed Shared Memory. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1998, v:47, n:10, pp:1056-1072 [Journal]
- Ravi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt
QoS policies and architecture for cache/memory in CMP platforms. [Citation Graph (0, 0)][DBLP] SIGMETRICS, 2007, pp:25-36 [Conf]
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments. [Citation Graph (, )][DBLP]
Disaggregated memory for expansion and sharing in blade servers. [Citation Graph (, )][DBLP]
End-to-end performance forecasting: finding bottlenecks before they happen. [Citation Graph (, )][DBLP]
Full-System Critical Path Analysis. [Citation Graph (, )][DBLP]
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