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James Laudon :
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Kourosh Gharachorloo , Daniel Lenoski , James Laudon , Phillip B. Gibbons , Anoop Gupta , John L. Hennessy Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors. [Citation Graph (1, 0)][DBLP ] ISCA, 1990, pp:15-26 [Conf ] John D. Davis , James Laudon , Kunle Olukotun Maximizing CMP Throughput with Mediocre Cores. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2005, pp:51-62 [Conf ] James Laudon , Anoop Gupta , Mark Horowitz Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. [Citation Graph (0, 0)][DBLP ] ASPLOS, 1994, pp:308-318 [Conf ] James E. Smith , G. E. Dermer , B. D. Vanderwarn , S. D. Klinger , C. M. Rozewski , D. L. Fowler , K. R. Scidmore , James Laudon The ZS-1 Central Processor. [Citation Graph (0, 0)][DBLP ] ASPLOS, 1987, pp:199-204 [Conf ] Kourosh Gharachorloo , Daniel Lenoski , James Laudon , Phillip B. Gibbons , Anoop Gupta , John L. Hennessy Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:376-387 [Conf ] Daniel Lenoski , James Laudon , Truman Joe , David Nakahira , Luis Stevens , Anoop Gupta , John L. Hennessy The DASH Prototype: Implementation and Performance. [Citation Graph (0, 0)][DBLP ] ISCA, 1992, pp:92-103 [Conf ] Daniel Lenoski , James Laudon , Truman Joe , David Nakahira , Luis Stevens , Anoop Gupta , John L. Hennessy The DASH Prototype: Implementation and Performance. [Citation Graph (0, 0)][DBLP ] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:418-429 [Conf ] Daniel Lenoski , James Laudon Retrospective: The DASH Prototype: Implementation and Performance. [Citation Graph (0, 0)][DBLP ] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:80-82 [Conf ] Daniel Lenoski , James Laudon , Kourosh Gharachorloo , Anoop Gupta , John L. Hennessy The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor. [Citation Graph (0, 0)][DBLP ] ISCA, 1990, pp:148-159 [Conf ] James Laudon , Daniel Lenoski The SGI Origin: A ccNUMA Highly Scalable Server. [Citation Graph (0, 0)][DBLP ] ISCA, 1997, pp:241-251 [Conf ] Kyle J. Nesbit , Nidhi Aggarwal , James Laudon , James E. Smith Fair Queuing Memory Systems. [Citation Graph (0, 0)][DBLP ] MICRO, 2006, pp:208-222 [Conf ] Daniel Lenoski , James Laudon , Kourosh Gharachorloo , Wolf-Dietrich Weber , Anoop Gupta , John L. Hennessy , Mark Horowitz , Monica S. Lam The Stanford Dash Multiprocessor. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 1992, v:25, n:3, pp:63-79 [Journal ] John D. Davis , Cong Fu , James Laudon The RASE (Rapid, Accurate Simulation Environment) for chip multiprocessors. [Citation Graph (0, 0)][DBLP ] SIGARCH Computer Architecture News, 2005, v:33, n:4, pp:14-23 [Journal ] James Laudon Performance/Watt: the new server focus. [Citation Graph (0, 0)][DBLP ] SIGARCH Computer Architecture News, 2005, v:33, n:4, pp:5-13 [Journal ] Daniel Lenoski , James Laudon , Truman Joe , David Nakahira , Luis Stevens , Anoop Gupta , John L. Hennessy The DASH Prototype: Logic Overhead and Performance. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:1, pp:41-61 [Journal ] Kyle J. Nesbit , James Laudon , James E. Smith Virtual private caches. [Citation Graph (0, 0)][DBLP ] ISCA, 2007, pp:57-68 [Conf ] James Laudon , Lawrence Spracklen The Coming Wave of Multithreaded Chip Multiprocessors. [Citation Graph (0, 0)][DBLP ] International Journal of Parallel Programming, 2007, v:35, n:3, pp:299-330 [Journal ] Search in 0.004secs, Finished in 0.005secs