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Alexandru Nicolau: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Carrie J. Brownhill, Alexandru Nicolau, Steven Novack, Constantine D. Polychronopoulos
    The PROMIS Compiler Prototype. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1997, pp:116-125 [Conf]
  2. Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama, Ashok Halambi
    New directions in compiler technology for embedded systems (embedded tutorial). [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:409-414 [Conf]
  3. Prabhat Mishra, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama
    Automatic Modeling and Validation of Pipeline Specifications driven by an Architecture Description Language. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:458-466 [Conf]
  4. Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau
    Equivalence checking of arithmetic expressions using fast evaluation. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:147-156 [Conf]
  5. Hideki Saito, Nicholas Stavrakos, Steven Carroll, Constantine D. Polychronopoulos, Alexandru Nicolau
    The Design of the PROMIS Compiler. [Citation Graph (0, 0)][DBLP]
    CC, 1999, pp:214-228 [Conf]
  6. Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau
    Operation tables for scheduling in the presence of incomplete bypassing. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:194-199 [Conf]
  7. Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau
    Aggregating processor free time for energy reduction. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:154-159 [Conf]
  8. Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkarmark, Xinmin Tian, Hideki Saito
    Challenges in exploitation of loop parallelism in embedded applications. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:173-180 [Conf]
  9. Kevin Karplus, Alexandru Nicolau
    Getting High Performance with Slow Memory. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1986, pp:248-253 [Conf]
  10. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Memory aware compilation through accurate timing extraction. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:316-321 [Conf]
  11. Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem
    Coordinated transformations for high-level synthesis of high performance microprocessor blocks. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:898-903 [Conf]
  12. Sumit Gupta, Nick Savoiu, Sunwoo Kim, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    Speculation Techniques for High Level Synthesis of Control Intensive Designs. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:269-272 [Conf]
  13. Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta
    Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:556-561 [Conf]
  14. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
    Minimization of Memory Traffic in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:149-154 [Conf]
  15. Alexandru Nicolau, Roni Potasman
    Incremental Tree Height Reduction for High Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:770-774 [Conf]
  16. Roni Potasman, Joseph Lis, Alexandru Nicolau, Daniel Gajski
    Percolation Based Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:444-449 [Conf]
  17. Haigeng Wang, Nikil D. Dutt, Alexandru Nicolau, Kai-Yeung Siu
    High-Level Synthesis of Scalable Architectures for IIR Filters using Multichip Modules. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:336-342 [Conf]
  18. Steven Novack, Alexandru Nicolau, Nikil D. Dutt
    A Unified code generation approach using mutation scheduling. [Citation Graph (0, 0)][DBLP]
    Code Generation for Embedded Processors, 1994, pp:203-218 [Conf]
  19. Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau
    Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:168-175 [Conf]
  20. Nikhil Bansal, Sumit Gupta, Nikil Dutt, Alexandru Nicolau, Rajesh Gupta
    Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:474-479 [Conf]
  21. Radu Cornea, Alexandru Nicolau, Nikil D. Dutt
    Software annotations for power optimization on mobile devices. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:684-689 [Conf]
  22. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Access pattern based local memory customization for low power embedded systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:778-784 [Conf]
  23. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Memory System Connectivity Exploration. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:894-901 [Conf]
  24. Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10270-10275 [Conf]
  25. Sumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru Nicolau
    Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:114-121 [Conf]
  26. Ashok Halambi, Radu Cornea, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Architecture Exploration of Parameterizable EPIC SOC Architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:748- [Conf]
  27. Ashok Halambi, Peter Grun, V. Ganesh, Asheesh Khare, Nikil D. Dutt, Alexandru Nicolau
    EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:485-490 [Conf]
  28. Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil D. Dutt, Alexandru Nicolau
    An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:402-408 [Conf]
  29. Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama
    Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:36-43 [Conf]
  30. Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau
    Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11064-11069 [Conf]
  31. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Data Cache Sizing for Embedded Processor Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:925-926 [Conf]
  32. Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Eugene Earlie
    PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1264-1269 [Conf]
  33. Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau
    Power Savings in Embedded Processors through Decode Filer Cache. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:443-448 [Conf]
  34. Ana Azevedo, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau
    High performance annotation-aware JVM for Java cards. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:52-61 [Conf]
  35. Alexander Aiken, Alexandru Nicolau
    Perfect Pipelining: A New Loop Parallelization Technique. [Citation Graph (0, 0)][DBLP]
    ESOP, 1988, pp:221-235 [Conf]
  36. Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta
    Energy Analysis of Multimedia Watermarking on Mobile Handheld Devices. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2005, pp:33-38 [Conf]
  37. Asheesh Khare, Nicolae Savoiu, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    V-SAT: A Visual Specification and Analysis Tool for System-On-Chip Exploration. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1196-1203 [Conf]
  38. Milind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
    Probablistic Self-Scheduling. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2006, pp:253-264 [Conf]
  39. Nikhil Bansal, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh K. Gupta
    Interconnect-Aware Mapping of Applications to Coarse-Grain Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:891-899 [Conf]
  40. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    MIST: An Algorithm for Memory Miss Traffic Management. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2000, pp:431-437 [Conf]
  41. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
    Integrating program transformations in the memory-based synthesis of image and video algorithms. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:27-30 [Conf]
  42. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Exploiting off-chip memory access modes in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:333-340 [Conf]
  43. Manev Luthra, Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    Interface Synthesis using Memory Mapping for an FPGA Platform. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:140-145 [Conf]
  44. Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau
    A Data Alignment Technique for Improving Cache Performance. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:587-592 [Conf]
  45. Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau
    Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:68-75 [Conf]
  46. Minyoung Kim, Hyunok Oh, Nikil D. Dutt, Alexandru Nicolau, Nalini Venkatasubramanian
    Probability Based Power Aware Error Resilient Coding. [Citation Graph (0, 0)][DBLP]
    ICDCS Workshops, 2005, pp:307-313 [Conf]
  47. Arthur Abnous, Roni Potasman, Nader Bagherzadeh, Alexandru Nicolau
    A Percolation Based VLIW Architecture. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:144-148 [Conf]
  48. Andrea Capitanio, Nikil D. Dutt, Alexandru Nicolau
    Partitioning of Variables for Multiple-Register-File VLIW Architectures. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1994, pp:298-301 [Conf]
  49. Laurie J. Hendren, Alexandru Nicolau
    Parallelizing Programs with Recursive Data Structures. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1989, pp:49-56 [Conf]
  50. Joseph Hummel, Laurie J. Hendren, Alexandru Nicolau
    Applying an Abstract Data Structure Description Approach to Parallelizing Scientific Pointer Programs. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1992, pp:100-104 [Conf]
  51. Joseph Hummel, Laurie J. Hendren, Alexandru Nicolau
    A Framework for Data Dependence Testing in the Presence of Pointers. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:216-224 [Conf]
  52. Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos
    History-aware Self-Scheduling. [Citation Graph (0, 0)][DBLP]
    ICPP, 2006, pp:185-192 [Conf]
  53. Ki-Chang Kim, Alexandru Nicolau
    Parallelizing Non-Vectorizable Loops for MIMD Machines. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1990, pp:114-118 [Conf]
  54. Alexandru Nicolau
    Uniform Parallelism Exploitation in Ordinary Programs. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:614-618 [Conf]
  55. Alexandru Nicolau, Steven Novack
    An Efficient Global Resource Constrained Technique for Exploiting Instruction Level Parallelism. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1992, pp:297-301 [Conf]
  56. Alexandru Nicolau, Steven Novack
    Trailblazing: A Hierarchical Approach to Percolation Scheduling. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:120-124 [Conf]
  57. Jiyuan Yang, Lubomir Bic, Alexandru Nicolau
    A Mapping Strategy for MIMD Computers. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:102-109 [Conf]
  58. Kemal Ebcioglu, Alexandru Nicolau
    A global resource-constrained parallelization technique. [Citation Graph (0, 0)][DBLP]
    ICS, 1989, pp:154-163 [Conf]
  59. Laurie J. Hendren, Alexandru Nicolau
    Intererence analysis tools for parallelizing programs with recursive data structures. [Citation Graph (0, 0)][DBLP]
    ICS, 1989, pp:205-214 [Conf]
  60. Srinivas Mantripragada, Alexandru Nicolau
    Using profiling to reduce branch misprediction costs on a dynamically scheduled processor. [Citation Graph (0, 0)][DBLP]
    ICS, 2000, pp:206-214 [Conf]
  61. Alexandru Nicolau
    Loop Quantization or Unwinding Done Right. [Citation Graph (0, 0)][DBLP]
    ICS, 1987, pp:294-308 [Conf]
  62. Alexander V. Veidenbaum, Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau, Xiaomei Ji
    Adapting cache line size to application behavior. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:145-154 [Conf]
  63. Haigeng Wang, Alexandru Nicolau
    Speedup of band linear recurrences in the presence of resource constraints. [Citation Graph (0, 0)][DBLP]
    ICS, 1992, pp:466-477 [Conf]
  64. Arun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
    On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:24- [Conf]
  65. Arun Kejariwal, Hideki Saito, Xinmin Tian, Milind Girkar, Wei Li, Utpal Banerjee, Alexandru Nicolau, Constantine D. Polychronopoulos
    Lightweight lock-free synchronization methods for multithreading. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:361-371 [Conf]
  66. Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau
    Customizing Software Toolkits for Embedded Systems-On-Chip. [Citation Graph (0, 0)][DBLP]
    DIPES, 2000, pp:87-98 [Conf]
  67. Andrea Capitanio, Nikil D. Dutt, Alexandru Nicolau
    Partitioning of Variables for Multiple-Register-File Architectures via Hypergraph Coloring. [Citation Graph (0, 0)][DBLP]
    IFIP PACT, 1994, pp:319-322 [Conf]
  68. Mantipragada Srinivas, Alexandru Nicolau, Vicki H. Allan
    An Approach to Combine Predicated/Speculative Execution for Programs with Unpredictable Branches. [Citation Graph (0, 0)][DBLP]
    IFIP PACT, 1994, pp:147-156 [Conf]
  69. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Aggressive Memory-Aware Compilation. [Citation Graph (0, 0)][DBLP]
    Intelligent Memory Systems, 2000, pp:147-151 [Conf]
  70. Dan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta
    Compiler-Directed Cache Line Size Adaptivity. [Citation Graph (0, 0)][DBLP]
    Intelligent Memory Systems, 2000, pp:183-187 [Conf]
  71. Alfred Brenner, Richard F. Freund, R. Stockton Gaines, Rob Kelly, Louis Lome, Richard McAndrew, Alexandru Nicolau, Janak H. Patel, Thomas Probert, John H. Reif, Jorge L. C. Sanz, Howard Jay Siegel, Jon A. Webb
    How Do We Make Parallel Processing a Reality? Bridging the Gap Between Theory and Practice. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:648-653 [Conf]
  72. Radu Cornea, Nikil D. Dutt, Rajesh K. Gupta, Ingolf Krüger, Alexandru Nicolau, Douglas C. Schmidt, Sandeep K. Shukla
    FORGE: A Framework for Optimization of Distributed Embedded Systems Software. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:208- [Conf]
  73. Joseph Hummel, Alexandru Nicolau, Laurie J. Hendren
    A Language for Conveying the Aliasing Properties of Dynamic, Pointer-Based Data Structures. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:208-216 [Conf]
  74. Ki-Chang Kim, Alexandru Nicolau
    Parallelizing Tightly Nested Loops. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:630-633 [Conf]
  75. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt, Ken Kennedy
    A Method for Register Allocation to Loops in Multiple Register File Architectures. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:28-33 [Conf]
  76. Shivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoungwoo Lee, Minyoung Kim, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau, Sandeep K. Shukla, Nalini Venkatasubramanian
    A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  77. M. Srinivas, Alexandru Nicolau
    Analyzing the Individual/Combined Effects of Speculative and Guarded Execution on a Superscalar Architecture. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:199-208 [Conf]
  78. Haigeng Wang, Alexandru Nicolau, Stephen Keung, Kai-Yeung Siu
    Scalable Techniques for Computing Band Linear Recurrences on Massively Parallel and Vector Supercomputers. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:502-508 [Conf]
  79. Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau
    Improving cache Performance Through Tiling and Data Alignment. [Citation Graph (0, 0)][DBLP]
    IRREGULAR, 1997, pp:167-185 [Conf]
  80. Xiaomei Ji, Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta
    Compiler-Directed Cache Assist Adaptivity. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2000, pp:88-104 [Conf]
  81. Carrie J. Brownhill, Alexandru Nicolau, Steven Novack, Constantine D. Polychronopoulos
    Achieving Multi-level Parallelization. [Citation Graph (0, 0)][DBLP]
    ISHPC, 1997, pp:183-194 [Conf]
  82. Weiyu Tang, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta
    Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2002, pp:120-132 [Conf]
  83. Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau
    Reducing data cache energy consumption via cached load/store queue. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:252-257 [Conf]
  84. Arun Kejariwal, Alexandru Nicolau
    An Efficient Load Balancing Scheme for Grid-based High Performance Scientific Computing. [Citation Graph (0, 0)][DBLP]
    ISPDC, 2005, pp:217-225 [Conf]
  85. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    APEX. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:25-32 [Conf]
  86. Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau
    RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions. [Citation Graph (0, 0)][DBLP]
    ISSS, 1999, pp:44-50 [Conf]
  87. Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    Conditional speculation and its effects on performance and area for high-level snthesis. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:171-176 [Conf]
  88. Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta
    Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:261-266 [Conf]
  89. Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau
    Functional abstraction driven design space exploration of heterogeneous programmable architectures. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:256-261 [Conf]
  90. Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi
    A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design . [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:120-125 [Conf]
  91. David J. Kolson, Alexandru Nicolau, Nikil Dutt, Ken Kennedy
    Optimal register assignment to loops for embedded code generation. [Citation Graph (0, 0)][DBLP]
    ISSS, 1995, pp:42-47 [Conf]
  92. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Memory Organization for Improved Data Cache Performance in Embedded Processors. [Citation Graph (0, 0)][DBLP]
    ISSS, 1996, pp:90-95 [Conf]
  93. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Architectural Exploration and Optimization of Local Memory in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:90-0 [Conf]
  94. Ana Azevedo, Alexandru Nicolau, Joseph Hummel
    Java Annotation-Aware Just-in-Time (AJIT) Complilation System. [Citation Graph (0, 0)][DBLP]
    Java Grande, 1999, pp:142-151 [Conf]
  95. Gianfranco Bilardi, Alexandru Nicolau, Joseph Hummel
    A Systematic Approach to Branch Speculation. [Citation Graph (0, 0)][DBLP]
    LCPC, 1997, pp:394-411 [Conf]
  96. Paolo D'Alberto, Alexandru Nicolau
    JuliusC: A Practical Approach for the Analysis of Divide-and-Conquer Algorithms. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:117-131 [Conf]
  97. Carrie J. Brownhill, Alexandru Nicolau
    A Hierarchical Parallelizing Compiler for VLIW/MIMD Machines. [Citation Graph (0, 0)][DBLP]
    LCPC, 1992, pp:49-63 [Conf]
  98. Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum
    A Data Cache with Dynamic Mapping. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:436-450 [Conf]
  99. Arun Kejariwal, Paolo D'Alberto, Alexandru Nicolau, Constantine D. Polychronopoulos
    A Geometric Approach for Partitioning N-Dimensional Non-rectangular Iteration Spaces. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:102-116 [Conf]
  100. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
    Copy Elimination for Parallelizing Compilers. [Citation Graph (0, 0)][DBLP]
    LCPC, 1998, pp:275-289 [Conf]
  101. Alexandru Nicolau, Roni Potasman, Haigeng Wang
    Register Allocation, Renaming and Their Impact on Fine-Grain Parallelism. [Citation Graph (0, 0)][DBLP]
    LCPC, 1991, pp:218-235 [Conf]
  102. Steven Novack, Joseph Hummel, Alexandru Nicolau
    A Simple Mechanism for Improving the Accuracy and Efficiency of Instruction-Level Disambiguation. [Citation Graph (0, 0)][DBLP]
    LCPC, 1995, pp:289-303 [Conf]
  103. Steven Novack, Alexandru Nicolau
    VISTA: The Visual Interface for Scheduling Transformations and Analysis. [Citation Graph (0, 0)][DBLP]
    LCPC, 1993, pp:449-460 [Conf]
  104. Steven Novack, Alexandru Nicolau
    Mutation Scheduling: A Unified Approach to Compiling for Fine-Grain Parallelism. [Citation Graph (0, 0)][DBLP]
    LCPC, 1994, pp:16-30 [Conf]
  105. Steven Novack, Alexandru Nicolau
    Resource-Directed Loop Pipelining. [Citation Graph (0, 0)][DBLP]
    LCPC, 1996, pp:192-206 [Conf]
  106. Nicholas Stavrakos, Steven Carroll, Hideki Saito, Constantine D. Polychronopoulos, Alexandru Nicolau
    Symbolic Analysis in the PROMIS Compiler. [Citation Graph (0, 0)][DBLP]
    LCPC, 1999, pp:468-471 [Conf]
  107. Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos
    An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:441-449 [Conf]
  108. Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie
    Bypass aware instruction scheduling for register file power reduction. [Citation Graph (0, 0)][DBLP]
    LCTES, 2006, pp:173-181 [Conf]
  109. Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau
    Caching Values in the Load Store Queue. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 2004, pp:580-587 [Conf]
  110. Andrea Capitanio, Nikil D. Dutt, Alexandru Nicolau
    Partitioned register files for VLIWs: a preliminary analysis of tradeoffs. [Citation Graph (0, 0)][DBLP]
    MICRO, 1992, pp:292-300 [Conf]
  111. Alexandru Nicolau, Roni Potasman
    Realistic scheduling: compaction for pipelined architectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1990, pp:69-79 [Conf]
  112. Haigeng Wang, Alexandru Nicolau, Roni Potasman
    A New Technique for Induction Variable Removal. [Citation Graph (0, 0)][DBLP]
    MICRO, 1991, pp:172-180 [Conf]
  113. Shivajit Mohapatra, Radu Cornea, Nikil D. Dutt, Alexandru Nicolau, Nalini Venkatasubramanian
    Integrated power management for video streaming to mobile handheld devices. [Citation Graph (0, 0)][DBLP]
    ACM Multimedia, 2003, pp:582-591 [Conf]
  114. Alexander Aiken, Alexandru Nicolau
    Optimal Loop Parallelization. [Citation Graph (0, 0)][DBLP]
    PLDI, 1988, pp:308-317 [Conf]
  115. Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau
    Parallel processing: a smart compiler and a dumb machine (with retrospective) [Citation Graph (0, 0)][DBLP]
    Best of PLDI, 1984, pp:112-124 [Conf]
  116. Laurie J. Hendren, Joseph Hummel, Alexandru Nicolau
    Abstractions for Recursive Pointer Data Structures: Improving the Analysis of Imperative Programs. [Citation Graph (0, 0)][DBLP]
    PLDI, 1992, pp:249-260 [Conf]
  117. Joseph Hummel, Laurie J. Hendren, Alexandru Nicolau
    A General Data Dependence Test for Dynamic, Pointer-Based Data Structures. [Citation Graph (0, 0)][DBLP]
    PLDI, 1994, pp:218-229 [Conf]
  118. Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Constantine D. Polychronopoulos
    A novel approach for partitioning iteration spaces with variable densities. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:120-131 [Conf]
  119. Alexandru Nicolau, Haigeng Wang
    Optimal Schedules for Parallel Prefix Computation with Bounded Resources. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1991, pp:1-10 [Conf]
  120. Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
    Tight analysis of the performance potential of thread speculation using spec CPU 2006. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2007, pp:215-225 [Conf]
  121. Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau
    Parallel processing: a smart compiler and a dumb machine. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Symposium on Compiler Construction, 1984, pp:37-47 [Conf]
  122. Arun Kejariwal, Alexandru Nicolau, Hideki Saito, Xinmin Tian, Milind Girkar, Utpal Banerjee, Constantine D. Polychronopoulos
    A general approach for partitioning N-dimensional parallel nested loops with conditionals. [Citation Graph (0, 0)][DBLP]
    SPAA, 2006, pp:49-58 [Conf]
  123. Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:461-466 [Conf]
  124. David J. Kolson, Nikil D. Dutt, Alexandru Nicolau
    Ultra Fine-Grain Template-Driven Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:25-28 [Conf]
  125. Prabhat Mishra, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Processor-Memory Co-Exploration driven by a Memory-Aware Architecture Description Language. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:70-75 [Conf]
  126. Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:458-0 [Conf]
  127. Haigeng Wang, Nikil D. Dutt, Alexandru Nicolau
    Harmonic Scheduling: A Technique for Scheduling Beyond Loop-Carried Dependencies. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:198-201 [Conf]
  128. Gianfranco Bilardi, Paolo D'Alberto, Alexandru Nicolau
    Fractal Matrix Multiplication: A Case Study on Portability of Cache Performance. [Citation Graph (0, 0)][DBLP]
    Algorithm Engineering, 2001, pp:26-38 [Conf]
  129. Steven Novack, Alexandru Nicolau
    Resource Directed Loop Pipelining: Exposing Just Enough Parallelism. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1997, v:40, n:6, pp:311-321 [Journal]
  130. Ana Azevedo, Alexandru Nicolau, Joseph Hummel
    An annotation-aware Java virtual machine implementation. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 2000, v:12, n:6, pp:423-444 [Journal]
  131. Joseph Hummel, Ana Azevedo, David J. Kolson, Alexandru Nicolau
    Annotating the Java Bytecodes in Support of Optimization. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1997, v:9, n:11, pp:1003-1016 [Journal]
  132. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau, Francky Catthoor, Arnout Vandecappelle, Erik Brockmeyer, Chidamber Kulkarni, Eddy de Greef
    Data Memory Organization and Optimizations in Application-Specific Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:3, pp:56-68 [Journal]
  133. Alexandru Nicolau
    Editor's Announcement. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 1998, v:26, n:1, pp:1-2 [Journal]
  134. Hideki Saito, Nicholas Stavrakos, Constantine D. Polychronopoulos, Alexandru Nicolau
    The Design of the PROMIS Compiler-Towards Multi-Level Parallelization. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2000, v:28, n:2, pp:195-212 [Journal]
  135. Micah Beck, Keshav Pingali, Alexandru Nicolau
    Static Scheduling for Dynamic Dataflow Machines. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1990, v:10, n:4, pp:279-288 [Journal]
  136. Alexandru Nicolau
    Loop Quantization: A Generalized Loop Unwinding Technique. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1988, v:5, n:5, pp:568-586 [Journal]
  137. Joseph Hummel, Laurie J. Hendren, Alexandru Nicolau
    Abstract Description of Pointer Data Structures: An Approach for Improving the Analysis and Optimization of Imperative Programs. [Citation Graph (0, 0)][DBLP]
    LOPLAS, 1992, v:1, n:3, pp:243-260 [Journal]
  138. Gianfranco Bilardi, Alexandru Nicolau
    Adaptive Bitonic Sorting: An Optimal Parallel Algorithm for Shared-Memory Machines. [Citation Graph (0, 0)][DBLP]
    SIAM J. Comput., 1989, v:18, n:2, pp:216-228 [Journal]
  139. Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta
    Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:2, pp:185-197 [Journal]
  140. Alexandru Nicolau
    Run-Time Disambiguation: Coping with Statically Unpredictable Dependencies. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:5, pp:663-678 [Journal]
  141. Alexandru Nicolau, Joseph A. Fisher
    Measuring the Parallelism Available for Very Long Instruction Word Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:11, pp:968-976 [Journal]
  142. Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau
    Augmenting Loop Tiling with Data Alignment for Improved Cache Performance. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:142-149 [Journal]
  143. Haigeng Wang, Alexandru Nicolau, Kai-Yeung Siu
    The Strict Time Lower Bound and Optimal Schedules for Parallel Prefix with Resource Constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:11, pp:1257-1271 [Journal]
  144. Sumit Gupta, Nicolae Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau
    Using global code motions to improve the quality of results for high-level synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:302-312 [Journal]
  145. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
    Elimination of redundant memory traffic in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:11, pp:1354-1364 [Journal]
  146. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Incorporating DRAM access modes into high-level synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:2, pp:96-109 [Journal]
  147. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Local memory exploration and optimization in embedded systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:1, pp:3-13 [Journal]
  148. Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    Access pattern-based memory and connectivity architecture exploration. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2003, v:2, n:1, pp:33-73 [Journal]
  149. Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau
    Coordinated parallelizing compiler optimizations and high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:441-470 [Journal]
  150. David J. Kolson, Alexandru Nicolau, Nikil D. Dutt, Ken Kennedy
    Optimal register assignment to loops for embedded code generation. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1996, v:1, n:2, pp:251-279 [Journal]
  151. Aviral Shrivastava, Partha Biswas, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau
    Compilation framework for code size reduction using reduced bit-width ISAs (rISAs). [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:123-146 [Journal]
  152. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:3, pp:682-704 [Journal]
  153. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Memory data organization for improved cache performance in embedded processor applications. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:4, pp:384-409 [Journal]
  154. Jacques Cohen, Alexandru Nicolau
    Comparison of Compacting Algorithms for Garbage Collection. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1983, v:5, n:4, pp:532-553 [Journal]
  155. Alexander Aiken, Alexandru Nicolau, Steven Novack
    Resource-Constrained Software Pipelining. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:12, pp:1248-1270 [Journal]
  156. Laurie J. Hendren, Alexandru Nicolau
    Parallelizing Programs with Recursive Data Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1990, v:1, n:1, pp:35-47 [Journal]
  157. Haigeng Wang, Alexandru Nicolau, Stephen Keung, Kai-Yeung Siu
    Computing Programs Containing Band Linear Recurrences on Vector Supercomputers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:8, pp:769-782 [Journal]
  158. Alexander Aiken, Alexandru Nicolau
    A Development Environment for Horizontal Microcode. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1988, v:14, n:5, pp:584-594 [Journal]
  159. Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau
    Retargetable pipeline hazard detection for partially bypassed processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:8, pp:791-801 [Journal]
  160. Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau
    Expression equivalence checking using interval analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:8, pp:830-842 [Journal]
  161. Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil D. Dutt, Rajesh K. Gupta
    Energy efficient watermarking on mobile devices using proxy-based partitioning. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:6, pp:625-636 [Journal]
  162. Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum
    A simplified java bytecode compilation system for resource-constrained embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:218-228 [Conf]
  163. Paolo D'Alberto, Alexandru Nicolau
    Adaptive Strassen's matrix multiplication. [Citation Graph (0, 0)][DBLP]
    ICS, 2007, pp:284-292 [Conf]
  164. Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum
    Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 2007, pp:361-362 [Conf]
  165. Paolo D'Alberto, Alexandru Nicolau
    R-Kleene: A High-Performance Divide-and-Conquer Algorithm for the All-Pair Shortest Path for Densely Connected Networks. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 2007, v:47, n:2, pp:203-213 [Journal]
  166. Weiyu Tang, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau
    A predictive decode filter cache for reducing power consumption in embedded processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:2, pp:- [Journal]
  167. Jie Gong, Daniel D. Gajski, Alexandru Nicolau
    Performance evaluation for application-specific architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:4, pp:483-490 [Journal]
  168. Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau
    RTGEN-an algorithm for automatic generation of reservation tables from architectural descriptions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:4, pp:731-737 [Journal]

  169. Exploitation of nested thread-level speculative parallelism on multi-core systems. [Citation Graph (, )][DBLP]


  170. Efficient utilization of scratch-pad memory in embedded processor applications. [Citation Graph (, )][DBLP]


  171. Efficient Scheduling of Nested Parallel Loops on Multi-Core Systems. [Citation Graph (, )][DBLP]


  172. Synchronization optimizations for efficient execution on multi-cores. [Citation Graph (, )][DBLP]


  173. Pretty Good Accuracy in Matrix Multiplication with GPUs. [Citation Graph (, )][DBLP]


  174. Impact of JVM superoperators on energy consumption in resource-constrained embedded systems. [Citation Graph (, )][DBLP]


  175. Cache-aware iteration space partitioning. [Citation Graph (, )][DBLP]


  176. Techniques for efficient placement of synchronization primitives. [Citation Graph (, )][DBLP]


  177. Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor. [Citation Graph (, )][DBLP]


  178. On the efficacy of call graph-level thread-level speculation. [Citation Graph (, )][DBLP]


  179. Performance Characterization of Itanium® 2-Based Montecito Processor. [Citation Graph (, )][DBLP]


  180. Cache-aware partitioning of multi-dimensional iteration spaces. [Citation Graph (, )][DBLP]


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