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Rajiv Gupta :
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Rajiv Gupta A Fresh Look at Optimizing Array Bound Checking. [Citation Graph (1, 0)][DBLP ] PLDI, 1990, pp:272-282 [Conf ] Rajiv Gupta , David A. Berson , Jesse Zhixi Fang Path Profile Guided Partial Dead Code Elimation Using Predication. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 1997, pp:102-0 [Conf ] Clara Jaramillo , Rajiv Gupta , Mary Lou Soffa Capturing the Effects of Code Improving Transformations. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 1998, pp:118-123 [Conf ] Soner Önder , Rajiv Gupta Superscalar Execution with Direct Data Forwarding. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 1998, pp:130-135 [Conf ] Soner Önder , Jun Xu , Rajiv Gupta Caching and Predicting Branch Sequences for Improved Fetch Effectiveness. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 1999, pp:294-302 [Conf ] Sriraman Tallam , Rajiv Gupta , Xiangyu Zhang Extended Whole Program Paths. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2005, pp:17-26 [Conf ] Xiangyu Zhang , Haifeng He , Neelam Gupta , Rajiv Gupta Experimental evaluation of using dynamic slices for fault location. [Citation Graph (0, 0)][DBLP ] AADEBUG, 2005, pp:33-42 [Conf ] Rajiv Gupta , Mary Lou Soffa SHAPE: a highly adaptable and parallel system. [Citation Graph (0, 0)][DBLP ] ACM Conference on Computer Science, 1986, pp:107-114 [Conf ] Rajiv Gupta The Fuzzy Barrier: A Mechanism for High Speed Synchronization of Processors. [Citation Graph (0, 0)][DBLP ] ASPLOS, 1989, pp:54-63 [Conf ] Youtao Zhang , Jun Yang , Rajiv Gupta Frequent Value Locality and Value-Centric Data Cache Design. [Citation Graph (0, 0)][DBLP ] ASPLOS, 2000, pp:150-159 [Conf ] Bengu Li , Rajiv Gupta Bit section instruction set extension of ARM for embedded applications. [Citation Graph (0, 0)][DBLP ] CASES, 2002, pp:69-78 [Conf ] Bengu Li , Rajiv Gupta Simple offset assignment in presence of subword data. [Citation Graph (0, 0)][DBLP ] CASES, 2003, pp:12-23 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa Register Pipelining: An Integrated Approach to Register Allocation for Scalar and Subscripted Variables. [Citation Graph (0, 0)][DBLP ] CC, 1992, pp:192-206 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa Reducing the Cost of Data Flow Analysis By Congruence Partitioning. [Citation Graph (0, 0)][DBLP ] CC, 1994, pp:357-373 [Conf ] Rajiv Gupta A Code Motion Framework for Global Instruction Scheduling. [Citation Graph (0, 0)][DBLP ] CC, 1998, pp:219-233 [Conf ] Rajiv Gupta , Rastislav Bodík Register Pressure Sensitive Redundancy Elimination. [Citation Graph (0, 0)][DBLP ] CC, 1999, pp:107-121 [Conf ] Rajiv Gupta , Eduard Mehofer , Youtao Zhang A Representation for Bit Section Based Analysis and Optimization. [Citation Graph (0, 0)][DBLP ] CC, 2002, pp:62-77 [Conf ] Siddharth Rele , Santosh Pande , Soner Önder , Rajiv Gupta Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. [Citation Graph (0, 0)][DBLP ] CC, 2002, pp:261-275 [Conf ] Youtao Zhang , Rajiv Gupta Data Compression Transformations for Dynamically Allocated Data Structures. [Citation Graph (0, 0)][DBLP ] CC, 2002, pp:14-28 [Conf ] Sriraman Tallam , Xiangyu Zhang , Rajiv Gupta Extending Path Profiling across Loop Backedges and Procedure Boundaries. [Citation Graph (0, 0)][DBLP ] CGO, 2004, pp:251-264 [Conf ] Xiangyu Zhang , Rajiv Gupta Hiding Program Slices for Software Security. [Citation Graph (0, 0)][DBLP ] CGO, 2003, pp:325-336 [Conf ] Rajiv Gupta SPMD Execution in the Presence of Dynamic Data Structures. [Citation Graph (0, 0)][DBLP ] Compiler Optimizations for Scalable Parallel Systems Languages, 2001, pp:683-708 [Conf ] Youtao Zhang , Rajiv Gupta Path Matching in Compressed Control Flow Trace. [Citation Graph (0, 0)][DBLP ] DCC, 2002, pp:132-141 [Conf ] Richard I. Hartley , Rajiv Gupta Linear Pushbroom Cameras. [Citation Graph (0, 0)][DBLP ] ECCV (1), 1994, pp:555-566 [Conf ] Rajiv Gupta PS: Polygon Streams - A Distributed Architecture for Incremental Computation Applied to Graphics. [Citation Graph (0, 0)][DBLP ] Advances in Computer Graphics Hardware, 1989, pp:91-111 [Conf ] Clara Jaramillo , Rajiv Gupta , Mary Lou Soffa Comparison Checking: An Approach to Avoid Debugging of Optimized Code. [Citation Graph (0, 0)][DBLP ] ESEC / SIGSOFT FSE, 1999, pp:268-284 [Conf ] Rastislav Bodík , Rajiv Gupta , Mary Lou Soffa Refining Data Flow Information Using Infeasible Paths. [Citation Graph (0, 0)][DBLP ] ESEC / SIGSOFT FSE, 1997, pp:361-377 [Conf ] Soner Önder , Rajiv Gupta Instruction Wake-Up in Wide Issue Superscalars. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2001, pp:418-427 [Conf ] Bengu Li , Ganesh Venkatesh , Brad Calder , Rajiv Gupta Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors. [Citation Graph (0, 0)][DBLP ] HiPEAC, 2005, pp:251-265 [Conf ] Tarun Nakra , Rajiv Gupta , Mary Lou Soffa Global Context-Based Value Prediction. [Citation Graph (0, 0)][DBLP ] HPCA, 1999, pp:4-12 [Conf ] Xin Yuan , Rami G. Melhem , Rajiv Gupta Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Networks. [Citation Graph (0, 0)][DBLP ] HPCA, 1997, pp:38-47 [Conf ] Youtao Zhang , Lan Gao , Jun Yang , Xiangyu Zhang , Rajiv Gupta SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] HPCA, 2005, pp:352-362 [Conf ] Kuen-Jong Lee , Rajiv Gupta , Melvin A. Breuer A New Method for Assigning Signal Flow Directions to MOS Transistors. [Citation Graph (0, 0)][DBLP ] ICCAD, 1990, pp:492-495 [Conf ] Xin Yuan , Rami G. Melhem , Rajiv Gupta Performance of Multihop Communications Using Logical Topologies on Optical Torus Networks. [Citation Graph (0, 0)][DBLP ] ICCCN, 1998, pp:494-501 [Conf ] Rajiv Gupta Phi-Test: Perfect Hashed Index Test for Test Response Validation. [Citation Graph (0, 0)][DBLP ] ICCD, 1993, pp:588-591 [Conf ] Soner Önder , Rajiv Gupta Automatic Generation of Microarchitecture Simulators. [Citation Graph (0, 0)][DBLP ] ICCL, 1998, pp:80-89 [Conf ] Rajiv Gupta , David A. Berson , Jesse Zhixi Fang Path Profile Guided Partial Redundancy Elimination Using Speculation. [Citation Graph (0, 0)][DBLP ] ICCL, 1998, pp:230-239 [Conf ] Rajiv Gupta , Daniel Mossé , Richard Suchoza Real-Time Scheduling Using Compact Task Graphs. [Citation Graph (0, 0)][DBLP ] ICDCS, 1996, pp:55-63 [Conf ] Rajiv Gupta , Madalene Spezialetti Dynamic Techniques for Minimizing the Intrusive Effect of Monitoring Actions. [Citation Graph (0, 0)][DBLP ] ICDCS, 1995, pp:368-376 [Conf ] Madalene Spezialetti , Rajiv Gupta Debugging Distributed Programs through the Detection of Simultaneous Events. [Citation Graph (0, 0)][DBLP ] ICDCS, 1994, pp:634-641 [Conf ] Wanqing Wu , Madalene Spezialetti , Rajiv Gupta On-Line Avoidance of the Intrusive Affects of Monitoring on Runtime Scheduling Decisions. [Citation Graph (0, 0)][DBLP ] ICDCS, 1996, pp:216-223 [Conf ] Wanqing Wu , Madalene Spezialetti , Rajiv Gupta A Protocol for Removing Communication Intrusion in Monitored Distributed Systems. [Citation Graph (0, 0)][DBLP ] ICDCS, 1998, pp:120-129 [Conf ] Wanqing Wu , Rajiv Gupta , Madalene Spezialetti Designing a Non-intrusive Monitoring Tool for Developing Complex Distributed Applications. [Citation Graph (0, 0)][DBLP ] ICECCS, 1996, pp:450-457 [Conf ] Rajiv Gupta Test-pattern Generation for VLSI Circuits in a Prolog Environment. [Citation Graph (0, 0)][DBLP ] ICLP, 1986, pp:528-535 [Conf ] Rajiv Gupta Synchronization and Communication Costs of Loop Partitioning on Shared-Memory Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] ICPP (2), 1989, pp:23-30 [Conf ] Rajiv Gupta , Mary Lou Soffa A Reconfigurable LIW Architecture. [Citation Graph (0, 0)][DBLP ] ICPP, 1987, pp:893-900 [Conf ] Chun Gong , Rajiv Gupta , Rami G. Melhem Compilation Techiques for Optimizing Communication on Distributed-Memory Systems. [Citation Graph (0, 0)][DBLP ] ICPP, 1993, pp:39-46 [Conf ] Madalene Spezialetti , Rajiv Gupta Perturbation Analysis: A Static Analysis Approach for the Non-Intrusive Monitoring of Distributed Programs. [Citation Graph (0, 0)][DBLP ] ICPP, 1994, pp:81-88 [Conf ] Jun Yang , Rajiv Gupta Load Redundancy Removal through Instruction Reuse. [Citation Graph (0, 0)][DBLP ] ICPP, 2000, pp:61-68 [Conf ] Xin Yuan , Rami G. Melhem , Rajiv Gupta A Timestamp-based Selective Invalidation Scheme for Multiprocessor Cache Coherence. [Citation Graph (0, 0)][DBLP ] ICPP, Vol. 3, 1996, pp:114-121 [Conf ] Youtao Zhang , Rajiv Gupta Enabling Partial Cache Line Prefetching Through Data Compression. [Citation Graph (0, 0)][DBLP ] ICPP, 2003, pp:277-285 [Conf ] J. Alison Noble , Rajiv Gupta , Joseph L. Mundy , Andrea Schmitz , Richard I. Hartley , W. Hoffman CAD-Based Inspection Using X-Ray Stereo. [Citation Graph (0, 0)][DBLP ] ICRA, 1995, pp:2361-2366 [Conf ] Soner Önder , Rajiv Gupta Load and store reuse using register file contents. [Citation Graph (0, 0)][DBLP ] ICS, 2001, pp:289-302 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa A Demand-Driven Analyzer for Data Flow Testing at the Integration Level. [Citation Graph (0, 0)][DBLP ] ICSE, 1996, pp:575-584 [Conf ] Xiangyu Zhang , Neelam Gupta , Rajiv Gupta Locating faults through automated predicate switching. [Citation Graph (0, 0)][DBLP ] ICSE, 2006, pp:272-281 [Conf ] Xiangyu Zhang , Rajiv Gupta , Youtao Zhang Precise Dynamic Slicing Algorithms. [Citation Graph (0, 0)][DBLP ] ICSE, 2003, pp:319-329 [Conf ] Xiangyu Zhang , Rajiv Gupta , Youtao Zhang Efficient Forward Computation of Dynamic Slices Using Reduced Ordered Binary Decision Diagrams. [Citation Graph (0, 0)][DBLP ] ICSE, 2004, pp:502-511 [Conf ] Rajiv Gupta , Melvin A. Breuer An Extensible User Interface for an Object-Oriented VLSI CAD Framework. [Citation Graph (0, 0)][DBLP ] ICSI, 1990, pp:559-568 [Conf ] Rajiv Gupta , Mary Lou Soffa A Framework for Partial Data Flow Analysis. [Citation Graph (0, 0)][DBLP ] ICSM, 1994, pp:4-13 [Conf ] Rajiv Gupta , Mary Lou Soffa Priority based data flow testing. [Citation Graph (0, 0)][DBLP ] ICSM, 1995, pp:348-357 [Conf ] Rajiv Gupta , Mary Lou Soffa Automatic Generation of a Compact Test Suit. [Citation Graph (0, 0)][DBLP ] IFIP Congress (1), 1992, pp:237-243 [Conf ] David A. Berson , Rajiv Gupta , Mary Lou Soffa URSA: A Unified ReSource Allocator for Registers and Functional Units in VLIW Architectures. [Citation Graph (0, 0)][DBLP ] Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993, pp:243-254 [Conf ] David A. Berson , Rajiv Gupta , Mary Lou Soffa Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers. [Citation Graph (0, 0)][DBLP ] IFIP PACT, 1994, pp:135-146 [Conf ] Robert Kramer , Rajiv Gupta , Mary Lou Soffa The Combining Dag: A Technique for Parallel DataMow Analysis. [Citation Graph (0, 0)][DBLP ] IPPS, 1992, pp:652-655 [Conf ] Sriraman Tallam , Rajiv Gupta Profile-Guided Java Program Partitioning for Power Aware Computing. [Citation Graph (0, 0)][DBLP ] IPDPS, 2004, pp:- [Conf ] Xin Yuan , Rajiv Gupta , Rami G. Melhem Compiler Analysis to Support Compiled Communication for HPF-Like Programs. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP, 1999, pp:603-608 [Conf ] David A. Berson , Rajiv Gupta , Mary Lou Soffa GURRR: A Global Unified Resource Requirements Representation. [Citation Graph (0, 0)][DBLP ] Intermediate Representations Workshop, 1995, pp:23-34 [Conf ] Tarun Nakra , Rajiv Gupta , Mary Lou Soffa Value Prediction in VLIW Machines. [Citation Graph (0, 0)][DBLP ] ISCA, 1999, pp:258-269 [Conf ] Jun Yang , Rajiv Gupta Energy-efficient load and store reuse. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:72-75 [Conf ] Jun Yang , Rajiv Gupta FV encoding for low-power data I/O. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:84-87 [Conf ] Rajiv Gupta , Madalene Spezialetti Loop Monotonic Computations: An Approach for the Efficient Run-Time Detection of Races. [Citation Graph (0, 0)][DBLP ] Symposium on Testing, Analysis, and Verification, 1991, pp:98-111 [Conf ] Neelam Gupta , Haifeng He , Xiangyu Zhang , Rajiv Gupta Locating faulty code using failure-inducing chops. [Citation Graph (0, 0)][DBLP ] ASE, 2005, pp:263-272 [Conf ] Rastislav Bodík , Rajiv Gupta Array Data Flow Analysis for Load-Store Optimizations in Superscalar Architectures. [Citation Graph (0, 0)][DBLP ] LCPC, 1995, pp:1-15 [Conf ] David A. Berson , Pohua P. Chang , Rajiv Gupta , Mary Lou Soffa Integrating Program Optimizations and Transformations with the Scheduling of Instruction Level Parallelism. [Citation Graph (0, 0)][DBLP ] LCPC, 1996, pp:207-221 [Conf ] David A. Berson , Rajiv Gupta , Mary Lou Soffa Integrated Instruction Scheduling and Register Allocation Techniques. [Citation Graph (0, 0)][DBLP ] LCPC, 1998, pp:247-262 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa Distributed Slicing and Partial Re-execution for Distributed Programs. [Citation Graph (0, 0)][DBLP ] LCPC, 1992, pp:497-511 [Conf ] Rajiv Gupta , Madalene Spezialetti Towards a Non-Intrusive Approach for Monitoring Distributed Computations through Perturbation Analysis. [Citation Graph (0, 0)][DBLP ] LCPC, 1993, pp:586-601 [Conf ] Bengu Li , Youtao Zhang , Rajiv Gupta Speculative Subword Register Allocation in Embedded Processors. [Citation Graph (0, 0)][DBLP ] LCPC, 2004, pp:56-71 [Conf ] Xin Yuan , Rajiv Gupta , Rami G. Melhem An Array Data Flow Analysis Based Communication Optimizer. [Citation Graph (0, 0)][DBLP ] LCPC, 1997, pp:246-260 [Conf ] Jodi Tims , Rajiv Gupta , Mary Lou Soffa Data Flow Analysis Driven Dynamic Data Partitioning. [Citation Graph (0, 0)][DBLP ] LCR, 1998, pp:75-90 [Conf ] Arvind Krishnaswamy , Rajiv Gupta Enhancing the performance of 16-bit code using augmenting instructions. [Citation Graph (0, 0)][DBLP ] LCTES, 2003, pp:254-264 [Conf ] Arvind Krishnaswamy , Rajiv Gupta Profile guided selection of ARM and thumb instructions. [Citation Graph (0, 0)][DBLP ] LCTES-SCOPES, 2002, pp:56-64 [Conf ] Santosh G. Abraham , Rabin A. Sugumar , Daniel Windheiser , B. Ramakrishna Rau , Rajiv Gupta Predictability of load/store instruction latencies. [Citation Graph (0, 0)][DBLP ] MICRO, 1993, pp:139-152 [Conf ] Rajiv Gupta A fine-grained MIMD architecture based upon register channels. [Citation Graph (0, 0)][DBLP ] MICRO, 1990, pp:28-37 [Conf ] Rajiv Gupta , David A. Berson , Jesse Zhixi Fang Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization. [Citation Graph (0, 0)][DBLP ] MICRO, 1997, pp:358-368 [Conf ] Arvind Krishnaswamy , Rajiv Gupta Efficient Use of Invisible Registers in Thumb Code. [Citation Graph (0, 0)][DBLP ] MICRO, 2005, pp:30-42 [Conf ] Sunah Lee , Rajiv Gupta Executing Loops on a Fine-Grained MIMD Architecture. [Citation Graph (0, 0)][DBLP ] MICRO, 1991, pp:199-205 [Conf ] Soner Önder , Rajiv Gupta Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing. [Citation Graph (0, 0)][DBLP ] MICRO, 1999, pp:170-176 [Conf ] Brian A. Malloy , Rajiv Gupta , Mary Lou Soffa A shape matching approach for scheduling fine-grained parallelism. [Citation Graph (0, 0)][DBLP ] MICRO, 1992, pp:264-267 [Conf ] Jun Yang , Rajiv Gupta Energy efficient frequent value data cache design. [Citation Graph (0, 0)][DBLP ] MICRO, 2002, pp:197-207 [Conf ] Jun Yang , Youtao Zhang , Rajiv Gupta Frequent value compression in data caches. [Citation Graph (0, 0)][DBLP ] MICRO, 2000, pp:258-265 [Conf ] Xiangyu Zhang , Rajiv Gupta Whole Execution Traces. [Citation Graph (0, 0)][DBLP ] MICRO, 2004, pp:105-116 [Conf ] Rajiv Gupta , Michael Epstein Achieving Low Cost Synchronization in a Multiprocessor System. [Citation Graph (0, 0)][DBLP ] PARLE (1), 1989, pp:70-84 [Conf ] Xin Yuan , Rajiv Gupta , Rami G. Melhem Does Time-Division Multiplexing Close the Gap between Memory and Optical Communication Speeds? [Citation Graph (0, 0)][DBLP ] PCRCW, 1997, pp:261-274 [Conf ] Rastislav Bodík , Rajiv Gupta Partial Dead Code Elimination using Slicing Transformations. [Citation Graph (0, 0)][DBLP ] PLDI, 1997, pp:159-170 [Conf ] Rastislav Bodík , Rajiv Gupta , Vivek Sarkar ABCD: eliminating array bounds checks on demand. [Citation Graph (0, 0)][DBLP ] PLDI, 2000, pp:321-333 [Conf ] Rastislav Bodík , Rajiv Gupta , Mary Lou Soffa Interprocedural Conditional Branch Elimination. [Citation Graph (0, 0)][DBLP ] PLDI, 1997, pp:146-158 [Conf ] Rastislav Bodík , Rajiv Gupta , Mary Lou Soffa Complete Removal of Redundant Computations. [Citation Graph (0, 0)][DBLP ] PLDI, 1998, pp:1-14 [Conf ] Rastislav Bodík , Rajiv Gupta , Mary Lou Soffa Complete removal of redundant expressions (with retrospective) [Citation Graph (0, 0)][DBLP ] Best of PLDI, 1998, pp:596-611 [Conf ] Rastislav Bodík , Rajiv Gupta , Mary Lou Soffa Load-Reuse Analysis: Design and Evaluation. [Citation Graph (0, 0)][DBLP ] PLDI, 1999, pp:64-76 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa A Practical Data Flow Framework for Array Reference Analysis and its Use in Optimizations. [Citation Graph (0, 0)][DBLP ] PLDI, 1993, pp:68-77 [Conf ] Rajiv Gupta , Mary Lou Soffa , Tim Steele Register Allocation via Clique Separators. [Citation Graph (0, 0)][DBLP ] PLDI, 1989, pp:264-274 [Conf ] Youtao Zhang , Rajiv Gupta Timestamped Whole Program Path Representation and its Applications. [Citation Graph (0, 0)][DBLP ] PLDI, 2001, pp:180-190 [Conf ] Xiangyu Zhang , Rajiv Gupta Cost effective dynamic program slicing. [Citation Graph (0, 0)][DBLP ] PLDI, 2004, pp:94-106 [Conf ] Xiangyu Zhang , Neelam Gupta , Rajiv Gupta Pruning dynamic slices with confidence. [Citation Graph (0, 0)][DBLP ] PLDI, 2006, pp:169-180 [Conf ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa Demand-driven Computation of Interprocedural Data Flow. [Citation Graph (0, 0)][DBLP ] POPL, 1995, pp:37-48 [Conf ] Rajiv Gupta Generalized Dominators and Post-Dominators. [Citation Graph (0, 0)][DBLP ] POPL, 1992, pp:246-257 [Conf ] Sriraman Tallam , Rajiv Gupta Bitwidth aware global register allocation. [Citation Graph (0, 0)][DBLP ] POPL, 2003, pp:85-96 [Conf ] Rajiv Gupta Employing Register Channels for the Exploitation of Instruction Level Parallelism. [Citation Graph (0, 0)][DBLP ] PPOPP, 1990, pp:118-127 [Conf ] Rajiv Gupta , Mary Lou Soffa Compile-time Techniques for Efficient Utilization of Parallel Memories. [Citation Graph (0, 0)][DBLP ] PPOPP/PPEALS, 1988, pp:235-246 [Conf ] Rajiv Gupta , Madalene Spezialetti Busy-Idle Profiles and Compact Task Graphs: Compile-Time Support for Interleaved and Overlapped Scheduling of Real- Time Tasks. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1994, pp:86-98 [Conf ] Wen-Ke Chen , Bengu Li , Rajiv Gupta Code Compaction of Matching Single-Entry Multiple-Exit Regions. [Citation Graph (0, 0)][DBLP ] SAS, 2003, pp:401-417 [Conf ] Clara Jaramillo , Rajiv Gupta , Mary Lou Soffa FULLDOC: A Full Reporting Debugger for Optimized Code. [Citation Graph (0, 0)][DBLP ] SAS, 2000, pp:240-259 [Conf ] Rajiv Gupta Loop displacement: an approach for transforming and scheduling loops for parallel execution. [Citation Graph (0, 0)][DBLP ] SC, 1990, pp:388-397 [Conf ] Rajiv Gupta , Chi-Hung Chi Improving instruction cache behavior by reducing cache pollution. [Citation Graph (0, 0)][DBLP ] SC, 1990, pp:82-91 [Conf ] Rajiv Gupta , Michael Epstein , Michael Whelan The design of a RISC based multiprocessor chip. [Citation Graph (0, 0)][DBLP ] SC, 1990, pp:920-929 [Conf ] Tia M. Watts , Mary Lou Soffa , Rajiv Gupta Techniques for Integrating Parallelizing Transformations and Compiler-Based Scheduling Methods. [Citation Graph (0, 0)][DBLP ] SC, 1992, pp:830-839 [Conf ] Rajiv Gupta , Mary Lou Soffa Hybrid Slicing: An Approach for Refining Static Slices Using Dynamic Information. [Citation Graph (0, 0)][DBLP ] SIGSOFT FSE, 1995, pp:29-40 [Conf ] Xiangyu Zhang , Rajiv Gupta Matching execution histories of program versions. [Citation Graph (0, 0)][DBLP ] ESEC/SIGSOFT FSE, 2005, pp:197-206 [Conf ] Xiangyu Zhang , Sriraman Tallam , Rajiv Gupta Dynamic slicing long running programs through execution fast forwarding. [Citation Graph (0, 0)][DBLP ] SIGSOFT FSE, 2006, pp:81-91 [Conf ] Madalene Spezialetti , Rajiv Gupta Exploiting Program Semantics for Efficient Instrumentation of Distributed Event Recognitions. [Citation Graph (0, 0)][DBLP ] Symposium on Reliable Distributed Systems, 1994, pp:181-190 [Conf ] Arvind Krishnaswamy , Rajiv Gupta Mixed-width instruction sets. [Citation Graph (0, 0)][DBLP ] Commun. ACM, 2003, v:46, n:8, pp:47-52 [Journal ] Rajiv Gupta , Wesley H. Cheng , Rajesh Gupta , Ido Hardonag , Melvin A. Breuer An Object-Oriented VLSI CAD Framework: A Case Study in Rapid Prototyping. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 1989, v:22, n:5, pp:28-37 [Journal ] Rajiv Gupta , Scott A. Smolka , Shaji Bhaskar On Randomization in Sequential and Distributed Algorithms. [Citation Graph (0, 0)][DBLP ] ACM Comput. Surv., 1994, v:26, n:1, pp:7-86 [Journal ] Rajiv Gupta , Rajagopalan Srinivasan , Melvin A. Breuer Reorganizing Circuits to Aid Testability. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1991, v:8, n:3, pp:49-57 [Journal ] Clara Jaramillo , Rajiv Gupta , Mary Lou Soffa Debugging and Testing Optimizers through Comparison Checking. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2002, v:65, n:2, pp:- [Journal ] Rajiv Gupta Generalized Dominators. [Citation Graph (0, 0)][DBLP ] Inf. Process. Lett., 1995, v:53, n:4, pp:193-200 [Journal ] Soner Önder , Rajiv Gupta Dynamic Memory Disambiguation in the Presence of Out-of-order Store Issuing. [Citation Graph (0, 0)][DBLP ] J. Instruction-Level Parallelism, 2002, v:4, n:, pp:- [Journal ] Rajiv Gupta SPMD Execution of Programs with Pointer-Based Data Structures on Distributed Memory Machines. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1992, v:16, n:2, pp:92-107 [Journal ] Xin Yuan , Rami G. Melhem , Rajiv Gupta Performance of Multi-hop Communications Using Logical Topologies on Optical Torus Networks. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 2001, v:61, n:6, pp:748-766 [Journal ] Yongjing Lin , Youtao Zhang , Rajiv Gupta The design and evaluation of path matching schemes on compressed control flow traces. [Citation Graph (0, 0)][DBLP ] Journal of Systems and Software, 2007, v:80, n:3, pp:396-409 [Journal ] Rajiv Gupta Optimizing Array Bound Checks Using Flow Analysis. [Citation Graph (0, 0)][DBLP ] LOPLAS, 1993, v:2, n:1-4, pp:135-150 [Journal ] Rajiv Gupta , Santosh Pande , Kleanthis Psarris , Vivek Sarkar Compilation techniques for parallel systems. [Citation Graph (0, 0)][DBLP ] Parallel Computing, 1999, v:25, n:13-14, pp:1741-1783 [Journal ] Xin Yuan , Rajiv Gupta , Rami G. Melhem Demand-Driven Data Flow Analysis for Communication Optimization. [Citation Graph (0, 0)][DBLP ] Parallel Processing Letters, 1997, v:7, n:4, pp:359-370 [Journal ] Rajiv Gupta , Madalene Spezialetti A Compact Task Graph Representation for Real-Time Scheduling. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 1996, v:11, n:1, pp:71-102 [Journal ] Alan H. Karp , Rajiv Gupta , Guillermo Juan Rozas , Arindam Banerji Using Split Capabilities for Access Control. [Citation Graph (0, 0)][DBLP ] IEEE Software, 2003, v:20, n:1, pp:42-49 [Journal ] Youtao Zhang , Rajiv Gupta Compressing heap data for improved memory performance. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 2006, v:36, n:10, pp:1081-1111 [Journal ] Rajiv Gupta Debugging Code Reorganized by a Trace Scheduling Compiler. [Citation Graph (0, 0)][DBLP ] Structured Programming, 1990, v:11, n:3, pp:141-150 [Journal ] Rajiv Gupta , Mary Jean Harrold , Mary Lou Soffa Program Slicing-Based Regression Testing Techniques. [Citation Graph (0, 0)][DBLP ] Softw. Test., Verif. Reliab., 1996, v:6, n:2, pp:83-111 [Journal ] Rajiv Gupta , Mary Lou Soffa Employing Static Information in the Generation of Test Cases. [Citation Graph (0, 0)][DBLP ] Softw. Test., Verif. Reliab., 1993, v:3, n:1, pp:29-48 [Journal ] Xiangyu Zhang , Rajiv Gupta Whole execution traces and their applications. [Citation Graph (0, 0)][DBLP ] TACO, 2005, v:2, n:3, pp:301-334 [Journal ] Rajesh Gupta , Rajiv Gupta , Melvin A. Breuer The BALLAST Methodology for Structured Partial Scan Design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1990, v:39, n:4, pp:538-544 [Journal ] Rajiv Gupta , Alessandro Zorat , I. V. Ramakrishnan Reconfigurable Multipipelines for Vector Supercomputers. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:9, pp:1297-1307 [Journal ] Xin Yuan , Rami G. Melhem , Rajiv Gupta Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:12, pp:1355-1363 [Journal ] Kuen-Jong Lee , Chih-Nan Wang , Rajiv Gupta , Melvin A. Breuer An integrated system for assigning signal flow directions to CMOS transistors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:12, pp:1445-1458 [Journal ] Jun Yang , Rajiv Gupta Frequent value locality and its applications. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2002, v:1, n:1, pp:79-105 [Journal ] Arvind Krishnaswamy , Rajiv Gupta Dynamic coalescing for 16-bit instructions. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2005, v:4, n:1, pp:3-37 [Journal ] Jun Yang , Rajiv Gupta , Chuanjun Zhang Frequent value encoding for low power data buses. [Citation Graph (0, 0)][DBLP ] ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:3, pp:354-384 [Journal ] Evelyn Duesterwald , Rajiv Gupta , Mary Lou Soffa A Practical Framework for Demand-Driven Interprocedural Data Flow Analysis. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 1997, v:19, n:6, pp:992-1030 [Journal ] Rajiv Gupta , Mary Lou Soffa , Denise Ombres Efficient Register Allocation via Coloring Using Clique Separators. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 1994, v:16, n:3, pp:370-386 [Journal ] Xiangyu Zhang , Rajiv Gupta , Youtao Zhang Cost and precision tradeoffs of dynamic data slicing algorithms. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 2005, v:27, n:4, pp:631-661 [Journal ] Rajiv Gupta , Mary Lou Soffa , John Howard Hybrid Slicing: Integrating Dynamic Information with Static Analysis. [Citation Graph (0, 0)][DBLP ] ACM Trans. Softw. Eng. Methodol., 1997, v:6, n:4, pp:370-397 [Journal ] Mary Jean Harrold , Rajiv Gupta , Mary Lou Soffa A Methodology for Controlling the Size of a Test Suite. [Citation Graph (0, 0)][DBLP ] ACM Trans. Softw. Eng. Methodol., 1993, v:2, n:3, pp:270-285 [Journal ] Chun Gong , Rami G. Melhem , Rajiv Gupta Loop Transformations for Fault Detection in Regular Loops on Massively Parallel Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:12, pp:1238-1249 [Journal ] Rajiv Gupta Synchronization and Communication Costs of Loop Partitioning on Shared-Memory Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1992, v:3, n:4, pp:505-512 [Journal ] Rajiv Gupta , Mary Lou Soffa Compile-Time Techniques for Improving Scalar Access Performance in Parallel Memories. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1991, v:2, n:2, pp:138-148 [Journal ] Robert Kramer , Rajiv Gupta , Mary Lou Soffa The Combining DAG: A Technique for Parallel Data Flow Analysis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1994, v:5, n:8, pp:805-813 [Journal ] Xin Yuan , Rami G. Melhem , Rajiv Gupta Algorithms for Supporting Compiled Communication. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 2003, v:14, n:2, pp:107-118 [Journal ] Rajiv Gupta , Mary Lou Soffa Region Scheduling: An Approach for Detecting and Redistributing Parallelism. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Software Eng., 1990, v:16, n:4, pp:421-431 [Journal ] Madalene Spezialetti , Rajiv Gupta Loop Monotonic Statements. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Software Eng., 1995, v:21, n:6, pp:497-505 [Journal ] Vijay Nagarajan , Rajiv Gupta , Arvind Krishnaswamy Compiler-Assisted Memory Encryption for Embedded Processors. [Citation Graph (0, 0)][DBLP ] HiPEAC, 2007, pp:7-22 [Conf ] Neelam Gupta , Rajiv Gupta ExPert: Dynamic Analysis Based Fault Location via Execution Perturbations. [Citation Graph (0, 0)][DBLP ] IPDPS, 2007, pp:1-6 [Conf ] Sriraman Tallam , Chen Tian , Rajiv Gupta , Xiangyu Zhang Enabling tracing Of long-running multithreaded programs via dynamic execution reduction. [Citation Graph (0, 0)][DBLP ] ISSTA, 2007, pp:207-218 [Conf ] Xiangyu Zhang , Sriraman Tallam , Neelam Gupta , Rajiv Gupta Towards locating execution omission errors. [Citation Graph (0, 0)][DBLP ] PLDI, 2007, pp:415-424 [Conf ] Xiangyu Zhang , Neelam Gupta , Rajiv Gupta A study of effectiveness of dynamic slicing in locating real faults. [Citation Graph (0, 0)][DBLP ] Empirical Software Engineering, 2007, v:12, n:2, pp:143-160 [Journal ] Sriraman Tallam , Rajiv Gupta Unified control flow and data dependence traces. [Citation Graph (0, 0)][DBLP ] TACO, 2007, v:4, n:3, pp:- [Journal ] Rajiv Gupta , Yunheung Paek Introduction to the special LCTES'05 issue. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2007, v:6, n:4, pp:- [Journal ] Avoiding Program Failures Through Safe Execution Perturbations. [Citation Graph (, )][DBLP ] Multi-turn, tension-stiffening catheter navigation system. [Citation Graph (, )][DBLP ] Dynamic slicing of multithreaded programs for race detection. [Citation Graph (, )][DBLP ] Identifying the root causes of memory bugs using corrupted memory location suppression. [Citation Graph (, )][DBLP ] Matching Control Flow of Program Versions. [Citation Graph (, )][DBLP ] ONTRAC: A system for efficient ONline TRACing for debugging. [Citation Graph (, )][DBLP ] Effective and efficient localization of multiple faults using value replacement. [Citation Graph (, )][DBLP ] Detecting virus mutations via dynamic matching. [Citation Graph (, )][DBLP ] Scalable dynamic information flow tracking and its applications. [Citation Graph (, )][DBLP ] ECMon: exposing cache events for monitoring. [Citation Graph (, )][DBLP ] Dynamic recognition of synchronization operations for improved data race detection. [Citation Graph (, )][DBLP ] Fault localization using value replacement. [Citation Graph (, )][DBLP ] Support for symmetric shadow memory in multiprocessors. [Citation Graph (, )][DBLP ] Self-recovery in server programs. [Citation Graph (, )][DBLP ] Speculative parallelization using state separation and multiple value prediction. [Citation Graph (, )][DBLP ] BugFix: A learning-based tool to assist developers in fixing bugs. [Citation Graph (, )][DBLP ] Speculative Optimizations for Parallel Programs on Multicores. [Citation Graph (, )][DBLP ] Copy or Discard execution model for speculative parallelization on multicores. [Citation Graph (, )][DBLP ] Learning universal probabilistic models for fault localization. [Citation Graph (, )][DBLP ] Supporting speculative parallelization in the presence of dynamic data structures. [Citation Graph (, )][DBLP ] Architectural support for shadow memory in multiprocessors. [Citation Graph (, )][DBLP ] Search in 0.009secs, Finished in 0.756secs