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Michel Dagenais: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Michel Dagenais, Ettore Merlo, Bruno Laguë, Daniel Proulx
    Clones occurence in large object oriented software packages. [Citation Graph (0, 0)][DBLP]
    CASCON, 1998, pp:10- [Conf]
  2. Makan Pourzandi, Ibrahim Haddad, Charles Levert, Miroslaw Zakrzewski, Michel Dagenais
    A New Architecture for Secure Carrier-Class Clusters. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2002, pp:494-498 [Conf]
  3. Ettore Merlo, Michel Dagenais, P. Bachand, J. S. Sormani, Sara Gradara, Giuliano Antoniol
    Investigating Large Software System Evolution: The Linux Kernel. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 2002, pp:421-426 [Conf]
  4. Serge Gaiotti, Michel Dagenais, Nicholas C. Rumin
    Worst-case Delay Estimation of Transistor Groups. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:491-495 [Conf]
  5. Michel Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
    The McBOOLE logic minimizer. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:667-673 [Conf]
  6. Benoit Poirier, Michel Dagenais
    An interactive system to extract structured text from a geometrical representation. [Citation Graph (0, 0)][DBLP]
    ICDAR, 1997, pp:342-346 [Conf]
  7. Ying Hu, Ettore Merlo, Michel Dagenais, Bruno Laguë
    C/C++ Conditional Compilation Analysis using Symbolic Execution. [Citation Graph (0, 0)][DBLP]
    ICSM, 2000, pp:196-206 [Conf]
  8. Bruno Malenfant, Giuliano Antoniol, Ettore Merlo, Michel Dagenais
    Flow Analysis to Detect Blocked Statements. [Citation Graph (0, 0)][DBLP]
    ICSM, 2001, pp:62-0 [Conf]
  9. Gregory Knapen, Bruno Laguë, Michel Dagenais, Ettore Merlo
    Parsing C++ Despite Missing Declarations. [Citation Graph (0, 0)][DBLP]
    IWPC, 1999, pp:114-125 [Conf]
  10. Bruno Laguë, Charles Leduc, André Le Bon, Ettore Merlo, Michel Dagenais
    An Analysis Framework for Understanding Layered Software Architectures. [Citation Graph (0, 0)][DBLP]
    IWPC, 1998, pp:37-44 [Conf]
  11. Jean-François Patenaude, Ettore Merlo, Michel Dagenais, Bruno Laguë
    Extending Software Quality Assessment Techniques to Java Systems. [Citation Graph (0, 0)][DBLP]
    IWPC, 1999, pp:49-0 [Conf]
  12. Michel Dagenais, Stéphane Boucher, Robert Gérin-Lajoie, Pierre Laplante, Pierre Mailhot
    LUDE: A Distributed Software Library. [Citation Graph (0, 0)][DBLP]
    LISA, 1993, pp:- [Conf]
  13. Magdalena Balazinska, Ettore Merlo, Michel Dagenais, Bruno Laguë, Kostas Kontogiannis
    Measuring Clone Based Reengineering Opportunities. [Citation Graph (0, 0)][DBLP]
    IEEE METRICS, 1999, pp:292-303 [Conf]
  14. Karim Yaghmour, Michel Dagenais
    Measuring and Characterizing System Behavior Using Kernel-Level Event Logging. [Citation Graph (0, 0)][DBLP]
    USENIX Annual Technical Conference, General Track, 2000, pp:13-26 [Conf]
  15. Magdalena Balazinska, Ettore Merlo, Michel Dagenais, Bruno Laguë, Kostas Kontogiannis
    Advanced Clone-Analysis to Support Object-Oriented System Refactoring. [Citation Graph (0, 0)][DBLP]
    WCRE, 2000, pp:98-107 [Conf]
  16. Magdalena Balazinska, Ettore Merlo, Michel Dagenais, Bruno Laguë, Kostas Kontogiannis
    Partial Redesign of Java Software Systems Based on Clone Analysis. [Citation Graph (0, 0)][DBLP]
    WCRE, 1999, pp:326-336 [Conf]
  17. Jean Mayrand, Jean-François Patenaude, Ettore Merlo, Michel Dagenais, Bruno Laguë
    Software assessment using metrics: A comparison across large C++ and Java systems. [Citation Graph (0, 0)][DBLP]
    Ann. Software Eng., 2000, v:9, n:, pp:117-141 [Journal]
  18. Yves Blaquière, Michel Dagenais, Yvon Savaria
    Timing analysis speed-up using a hierarchical and a multimode approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:2, pp:244-255 [Journal]
  19. Michel Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
    McBOOLE: A New Procedure for Exact Logic Minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:1, pp:229-238 [Journal]
  20. Michel Dagenais, Serge Gaiotti, Nicholas C. Rumin
    Transistor-level estimation of worst-case delays in MOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:3, pp:384-395 [Journal]
  21. Michel Dagenais, Nicholas C. Rumin
    On the calculation of optimal clocking parameters in synchronous circuits with level-sensitive latches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:3, pp:268-278 [Journal]
  22. Marc Chatel, Michel Dagenais, Charles Levert, Makan Pourzandi
    Security in Carrier Class Server Applications for All-IP Networks [Citation Graph (0, 0)][DBLP]
    CoRR, 2004, v:0, n:, pp:- [Journal]

  23. L-SYNC: Larger Degree Clustering Based Time-Synchronisation for Wireless Sensor Network. [Citation Graph (, )][DBLP]


  24. Automata-based approach for kernel trace analysis. [Citation Graph (, )][DBLP]


  25. Fast Recompilation of Object Oriented Modules [Citation Graph (, )][DBLP]


  26. Software Performance Analysis [Citation Graph (, )][DBLP]


  27. Disks, Partitions, Volumes and RAID Performance with the Linux Operating System [Citation Graph (, )][DBLP]


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