The SCEAS System
Navigation Menu

Search the dblp DataBase


Brad Calder: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lori Carter, Beth Simon, Brad Calder, Larry Carter, Jeanne Ferrante
    Predicated Static Single Assignment. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:245-255 [Conf]
  2. Artur Klauser, Todd M. Austin, Dirk Grunwald, Brad Calder
    Dynamic Hammock Predication for Non-Predicated Instruction Set Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:278-285 [Conf]
  3. Erez Perelman, Trishul M. Chilimbi, Brad Calder
    Variational Path Profiling. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:7-16 [Conf]
  4. Erez Perelman, Greg Hamerly, Brad Calder
    Picking Statistically Valid and Early Simulation Points. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:244-0 [Conf]
  5. Timothy Sherwood, Erez Perelman, Brad Calder
    Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2001, pp:3-14 [Conf]
  6. Eric Tune, Dean M. Tullsen, Brad Calder
    Quantifying Instruction Criticality. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2002, pp:104-0 [Conf]
  7. Weifeng Zhang, Brad Calder, Dean M. Tullsen
    An Event-Driven Multithreaded Dynamic Optimization Framework. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:87-98 [Conf]
  8. Brad Calder, Dirk Grunwald
    Reducing Branch Costs via Branch Alignment. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1994, pp:242-251 [Conf]
  9. Brad Calder, Chandra Krintz, Simmi John, Todd M. Austin
    Cache-Conscious Data Placement. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:139-149 [Conf]
  10. Chandra Krintz, Brad Calder, Han Bok Lee, Benjamin G. Zorn
    Overlapping Execution with Transfer Using Non-Strict Execution for Mobile Programs. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:159-169 [Conf]
  11. Timothy Sherwood, Erez Perelman, Greg Hamerly, Brad Calder
    Automatically characterizing large scale program behavior. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2002, pp:45-57 [Conf]
  12. Weihaw Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Brad Calder, Osvaldo Colavin
    Unbounded page-based transactional memory. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:347-358 [Conf]
  13. Satish Narayanasamy, Cristiano Pereira, Brad Calder
    Recording shared memory dependencies using strata. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:229-240 [Conf]
  14. Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood, Brad Calder
    Reducing code size with echo instructions. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:84-94 [Conf]
  15. Timothy Sherwood, Brad Calder
    Patchable instruction ROM architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:24-33 [Conf]
  16. Timothy Sherwood, Mark Oskin, Brad Calder
    Balancing design options with Sherpa. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:57-68 [Conf]
  17. Weihaw Chuang, Brad Calder, Jeanne Ferrante
    Phi-Predication for Light-Weight If-Conversion. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:179-192 [Conf]
  18. Weifeng Zhang, Brad Calder, Dean M. Tullsen
    A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:50-64 [Conf]
  19. Jeremy Lau, Erez Perelman, Brad Calder
    Selecting Software Phase Markers with Code Structure Analysis. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:135-146 [Conf]
  20. Cristiano Pereira, Jeremy Lau, Brad Calder, Rajesh K. Gupta
    Dynamic phase analysis for cycle-close trace generation. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:321-326 [Conf]
  21. Timothy Sherwood, Brad Calder
    ToolBlocks: An Infrastructure for the Construction of Memory Hierarchy Analysis Tools (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2000, pp:70-74 [Conf]
  22. Michael Van Biesbrouck, Lieven Eeckhout, Brad Calder
    Efficient Sampling Startup for Sampled Processor Simulation. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:47-67 [Conf]
  23. Bengu Li, Ganesh Venkatesh, Brad Calder, Rajiv Gupta
    Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2005, pp:251-265 [Conf]
  24. Brad Calder, Dirk Grunwald, Joel S. Emer
    Predictive Sequential Associative Cache. [Citation Graph (0, 0)][DBLP]
    HPCA, 1996, pp:244-253 [Conf]
  25. Jeremy Lau, Stefan Schoenmackers, Brad Calder
    Transition Phase Classification and Prediction. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:278-289 [Conf]
  26. Satish Narayanasamy, Timothy Sherwood, Suleyman Sair, Brad Calder, George Varghese
    Catching Accurate Profiles in Hardwar. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:269-280 [Conf]
  27. Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, Brad Calder
    Creating Converged Trace Schedules Using String Matching. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:210-221 [Conf]
  28. Suleyman Sair, Timothy Sherwood, Brad Calder
    Quantifying Load Stream Behavior. [Citation Graph (0, 0)][DBLP]
    HPCA, 2002, pp:197-0 [Conf]
  29. Beth Simon, Brad Calder, Jeanne Ferrante
    Incorporating Predicate Information into Branch Predictors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:53-64 [Conf]
  30. Eric Tune, Dongning Liang, Dean M. Tullsen, Brad Calder
    Dynamic Prediction of Critical Path Instructions. [Citation Graph (0, 0)][DBLP]
    HPCA, 2001, pp:185-196 [Conf]
  31. Steven Wallace, Dean M. Tullsen, Brad Calder
    Instruction Recycling on a Multiple-Path Processor. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:44-53 [Conf]
  32. Chandra Krintz, Brad Calder
    Reducing Delay with Dynamic Selection of Compression Formats. [Citation Graph (0, 0)][DBLP]
    HPDC, 2001, pp:266-0 [Conf]
  33. Lori Carter, Brad Calder
    Using predicate path information in hardware to determine true dependences. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:230-240 [Conf]
  34. Weihaw Chuang, Brad Calder
    Predicate prediction for efficient out-of-order execution. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:183-192 [Conf]
  35. Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin
    Classifying load and store instructions for memory renaming. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:399-407 [Conf]
  36. Timothy Sherwood, Brad Calder, Joel S. Emer
    Reducing cache misses using hardware and software page placement. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:155-164 [Conf]
  37. Nathan Tuck, Timothy Sherwood, Brad Calder, George Varghese
    Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2004, pp:- [Conf]
  38. Satish Narayanasamy, Hong Wang, Perry H. Wang, John Paul Shen, Brad Calder
    A Dependency Chain Clustered Microarchitecture. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  39. Erez Perelman, Marzia Polito, Jean-Yves Bouguet, Jack Sampson, Brad Calder, C. Dulong
    Detecting phases in parallel applications on shared memory architectures. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  40. Brad Calder, Dirk Grunwald
    Fast and Accurate Instruction Fetch and Branch Prediction. [Citation Graph (0, 0)][DBLP]
    ISCA, 1994, pp:2-11 [Conf]
  41. Brad Calder, Dirk Grunwald
    Next Cache Line and Set Prediction. [Citation Graph (0, 0)][DBLP]
    ISCA, 1995, pp:287-296 [Conf]
  42. Brad Calder, Glenn Reinman, Dean M. Tullsen
    Selective Value Prediction. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:64-74 [Conf]
  43. Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grunwald
    Instruction Cache Fetch Policies for Speculative Execution. [Citation Graph (0, 0)][DBLP]
    ISCA, 1995, pp:357-367 [Conf]
  44. Satish Narayanasamy, Gilles Pokam, Brad Calder
    BugNet: Continuously Recording Program Execution for Deterministic Replay Debugging. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:284-295 [Conf]
  45. Glenn Reinman, Todd M. Austin, Brad Calder
    A Scalable Front-End Architecture for Fast Instruction Delivery. [Citation Graph (0, 0)][DBLP]
    ISCA, 1999, pp:234-245 [Conf]
  46. Timothy Sherwood, Brad Calder
    Automated design of finite state machine predictors for customized processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2001, pp:86-97 [Conf]
  47. Timothy Sherwood, Suleyman Sair, Brad Calder
    Phase Tracking and Prediction. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:336-347 [Conf]
  48. Timothy Sherwood, George Varghese, Brad Calder
    A Pipelined Memory Architecture for High Throughput Network Processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:288-299 [Conf]
  49. Steven Wallace, Brad Calder, Dean M. Tullsen
    Threaded Multiple Path Execution. [Citation Graph (0, 0)][DBLP]
    ISCA, 1998, pp:238-249 [Conf]
  50. Lori Carter, Weihaw Chuang, Brad Calder
    An EPIC Processor with Pending Functional Units. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2002, pp:310-320 [Conf]
  51. Barbara Kreaseck, Dean M. Tullsen, Brad Calder
    Limits of Task-Based Parallelism in Irregular Applications. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2000, pp:43-58 [Conf]
  52. Glenn Reinman, Brad Calder, Todd M. Austin
    High Performance and Energy Efficient Serial Prefetch Architecture. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2002, pp:146-159 [Conf]
  53. Timothy Sherwood, Brad Calder
    Loop Termination Prediction. [Citation Graph (0, 0)][DBLP]
    ISHPC, 2000, pp:73-87 [Conf]
  54. Michael Van Biesbrouck, Timothy Sherwood, Brad Calder
    A co-phase matrix to guide simultaneous multithreading simulation. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:45-56 [Conf]
  55. Brad Calder, Daniel Citron, Yale N. Patt, J. Smith
    The future of simulation: A field of dreams. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:169- [Conf]
  56. Jeremy Lau, Stefan Schoenmackers, Brad Calder
    Structures for phase classification. [Citation Graph (0, 0)][DBLP]
    ISPASS, 2004, pp:57-67 [Conf]
  57. Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen
    Pointer cache assisted prefetching. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:62-73 [Conf]
  58. Brad Calder, Peter Feller, Alan Eustace
    Value Profiling. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:259-269 [Conf]
  59. Brad Calder, Dirk Grunwald, Joel S. Emer
    A system level perspective on branch architecture performance. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:199-206 [Conf]
  60. Brad Calder, Dirk Grunwald, Amitabh Srivastava
    The predictability of branches in libraries. [Citation Graph (0, 0)][DBLP]
    MICRO, 1995, pp:24-34 [Conf]
  61. Nicholas C. Gloy, Trevor Blackwell, Michael D. Smith, Brad Calder
    Procedure Placement Using Temporal Ordering Information. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:303-313 [Conf]
  62. Glenn Reinman, Brad Calder
    Predictive Techniques for Aggressive Load Speculation. [Citation Graph (0, 0)][DBLP]
    MICRO, 1998, pp:127-137 [Conf]
  63. Glenn Reinman, Brad Calder, Todd M. Austin
    Fetch Directed Instruction Prefetching. [Citation Graph (0, 0)][DBLP]
    MICRO, 1999, pp:16-27 [Conf]
  64. Timothy Sherwood, Suleyman Sair, Brad Calder
    Predictor-directed stream buffers. [Citation Graph (0, 0)][DBLP]
    MICRO, 2000, pp:42-53 [Conf]
  65. Nathan Tuck, Brad Calder, George Varghese
    Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow. [Citation Graph (0, 0)][DBLP]
    MICRO, 2004, pp:209-220 [Conf]
  66. Eric Tune, Rakesh Kumar, Dean M. Tullsen, Brad Calder
    Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy. [Citation Graph (0, 0)][DBLP]
    MICRO, 2004, pp:183-194 [Conf]
  67. Jack Sampson, Rubén González, Jean-Francois Collard, Norman P. Jouppi, Mike Schlansker, Brad Calder
    Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:235-246 [Conf]
  68. Chandra Krintz, Brad Calder, Urs Hölzle
    Reducing Transfer Delay Using Java Class File Splitting and Prefetching. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 1999, pp:276-291 [Conf]
  69. Brad Calder, Dirk Grunwald, Donald C. Lindsay, James H. Martin, Michael Mozer, Benjamin G. Zorn
    Corpus-Based Static Branch Prediction. [Citation Graph (0, 0)][DBLP]
    PLDI, 1995, pp:79-92 [Conf]
  70. Amir H. Hashemi, David R. Kaeli, Brad Calder
    Efficient Procedure Mapping Using Cache Line Coloring. [Citation Graph (0, 0)][DBLP]
    PLDI, 1997, pp:171-182 [Conf]
  71. Chandra Krintz, Brad Calder
    Using Annotation to Reduce Dynamic Optimization Time. [Citation Graph (0, 0)][DBLP]
    PLDI, 2001, pp:156-167 [Conf]
  72. Jeremy Lau, Matthew Arnold, Michael Hind, Brad Calder
    Online performance auditing: using hot optimizations without getting burned. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:239-251 [Conf]
  73. Brad Calder, Dirk Grunwald
    Reducing Indirect Function call Overhead in C++ Programs. [Citation Graph (0, 0)][DBLP]
    POPL, 1994, pp:397-408 [Conf]
  74. David B. Wagner, Brad Calder
    Leapfrogging: A Portable Technique for Implementing Efficient Futures. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1993, pp:208-217 [Conf]
  75. Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder
    Automatic logging of operating system effects to guide application-level architecture simulation. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS/Performance, 2006, pp:216-227 [Conf]
  76. Erez Perelman, Greg Hamerly, Michael Van Biesbrouck, Timothy Sherwood, Brad Calder
    Using SimPoint for accurate and efficient simulation. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS, 2003, pp:318-319 [Conf]
  77. Brad Calder, Andrew A. Chien, Ju Wang, Don Yang
    The entropia virtual machine for desktop grids. [Citation Graph (0, 0)][DBLP]
    VEE, 2005, pp:186-196 [Conf]
  78. Joshua J. Yi, Lieven Eeckhout, David J. Lilja, Brad Calder, Lizy Kurian John, James E. Smith
    The Future of Simulation: A Field of Dreams. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2006, v:39, n:11, pp:22-29 [Journal]
  79. Lori Carter, Beth Simon, Brad Calder, Larry Carter, Jeanne Ferrante
    Path Analysis and Renaming for Predicated Instruction Scheduling. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2000, v:28, n:6, pp:563-588 [Journal]
  80. Brad Calder, Peter Feller, Alan Eustace
    Value Profiling and Optimization. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 1999, v:1, n:, pp:- [Journal]
  81. Brad Calder, Glenn Reinman
    A Comparative Survey of Load Speculation Architectures. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2000, v:2, n:, pp:- [Journal]
  82. Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Calder, Timothy Sherwood
    Using Machine Learning to Guide Architecture Simulation. [Citation Graph (0, 0)][DBLP]
    Journal of Machine Learning Research, 2006, v:7, n:, pp:343-378 [Journal]
  83. Andrew A. Chien, Brad Calder, Stephen Elbert, Karan Bhatia
    Entropia: architecture and performance of an enterprise desktop grid system. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2003, v:63, n:5, pp:597-610 [Journal]
  84. Glenn Reinman, Brad Calder
    Using a serial cache for energy efficient instruction fetching. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2004, v:50, n:11, pp:675-685 [Journal]
  85. Michael Van Biesbrouck, Brad Calder, Lieven Eeckhout
    Efficient Sampling Startup for SimPoint. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:4, pp:32-42 [Journal]
  86. Satish Narayanasamy, Gilles Pokam, Brad Calder
    BugNet: Recording Application-Level Execution for Deterministic Replay Debugging. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:1, pp:100-109 [Journal]
  87. Timothy Sherwood, Erez Perelman, Greg Hamerly, Suleyman Sair, Brad Calder
    Discovering and Exploiting Program Phases. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:84-93 [Journal]
  88. Greg Hamerly, Erez Perelman, Brad Calder
    How to use SimPoint to pick simulation points. [Citation Graph (0, 0)][DBLP]
    SIGMETRICS Performance Evaluation Review, 2004, v:31, n:4, pp:25-30 [Journal]
  89. Chandra Krintz, David Grove, Vivek Sarkar, Brad Calder
    Reducing the overhead of dynamic compilation. [Citation Graph (0, 0)][DBLP]
    Softw., Pract. Exper., 2001, v:31, n:8, pp:717-738 [Journal]
  90. Brad Calder, Dean M. Tullsen
    Introduction. [Citation Graph (0, 0)][DBLP]
    TACO, 2004, v:1, n:1, pp:1-2 [Journal]
  91. Brad Calder, Dean M. Tullsen
    Introduction. [Citation Graph (0, 0)][DBLP]
    TACO, 2005, v:2, n:1, pp:1-2 [Journal]
  92. Brad Calder, Dean M. Tullsen
    Introduction. [Citation Graph (0, 0)][DBLP]
    TACO, 2006, v:3, n:1, pp:1-2 [Journal]
  93. Glenn Reinman, Brad Calder, Todd M. Austin
    Optimizations Enabled by a Decoupled Front-End Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:4, pp:338-355 [Journal]
  94. Suleyman Sair, Timothy Sherwood, Brad Calder
    A Decoupled Predictor-Directed Stream Prefetching Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:3, pp:260-276 [Journal]
  95. Brad Calder, Dirk Grunwald, Michael P. Jones, Donald C. Lindsay, James H. Martin, Michael Mozer, Benjamin G. Zorn
    Evidence-Based Static Branch Prediction Using Machine Learning. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1997, v:19, n:1, pp:188-222 [Journal]
  96. Satish Narayanasamy, Ayse Kivilcim Coskun, Brad Calder
    Transient fault prediction based on anomalies in processor events. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1140-1145 [Conf]
  97. Weihaw Chuang, Satish Narayanasamy, Brad Calder, Ranjit Jhala
    Bounds Checking with Taint-Based Analysis. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2007, pp:71-86 [Conf]
  98. Satish Narayanasamy, Zhenghao Wang, Jordan Tigani, Andrew Edwards, Brad Calder
    Automatically classifying benign and harmful data racesallusing replay analysis. [Citation Graph (0, 0)][DBLP]
    PLDI, 2007, pp:22-31 [Conf]
  99. Smruti R. Sarangi, Satish Narayanasamy, Bruce Carneal, Abhishek Tiwari, Brad Calder, Josep Torrellas
    Patching Processor Design Errors with Programmable Hardware. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2007, v:27, n:1, pp:12-25 [Journal]
  100. Brad Calder, Dean M. Tullsen
    Introduction. [Citation Graph (0, 0)][DBLP]
    TACO, 2007, v:4, n:1, pp:- [Journal]

  101. A Loop Correlation Technique to Improve Performance Auditing. [Citation Graph (, )][DBLP]

  102. Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy. [Citation Graph (, )][DBLP]

  103. Accelerating and Adapting Precomputation Threads for Effcient Prefetching. [Citation Graph (, )][DBLP]

  104. Speculative Code Value Specialization Using the Trace Cache Fill Unit. [Citation Graph (, )][DBLP]

  105. Patching Processor Design Errors. [Citation Graph (, )][DBLP]

  106. Comparing multinomial and k-means clustering for SimPoint. [Citation Graph (, )][DBLP]

  107. Considering all starting points for simultaneous multithreading simulation. [Citation Graph (, )][DBLP]

  108. Cross Binary Simulation Points. [Citation Graph (, )][DBLP]

  109. Motivation for Variable Length Intervals and Hierarchical Phase Behavior. [Citation Graph (, )][DBLP]

  110. The Strong correlation Between Code Signatures and Performance. [Citation Graph (, )][DBLP]

  111. Reproducible simulation of multi-threaded workloads for architecture design exploration. [Citation Graph (, )][DBLP]

  112. Software Profiling for Deterministic Replay Debugging of User Code. [Citation Graph (, )][DBLP]

Search in 0.022secs, Finished in 0.030secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002