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Peter M. W. Knijnenburg: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    Automatic Selection of Compiler Options Using Non-parametric Inferential Statistics. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:123-132 [Conf]
  2. Toru Kisuki, Peter M. W. Knijnenburg, Michael F. P. O'Boyle
    Combined Selection of Tile Sizes and Unroll Factors Using Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2000, pp:237-248 [Conf]
  3. Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Integrating Loop and Data Transformations for Global Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:12-0 [Conf]
  4. Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Efficient Parallelization Using Combined Loop and Data Transformations. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1999, pp:283-292 [Conf]
  5. Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero
    Architectural support for real-time task scheduling in SMT processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:166-176 [Conf]
  6. Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero
    Predictable performance in SMT processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:433-443 [Conf]
  7. Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    Optimizing general purpose compiler optimization. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:180-188 [Conf]
  8. Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero
    Implicit vs. Explicit Resource Allocation in SMT Processors. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:44-51 [Conf]
  9. Bas Aarts, Michel Barreteau, François Bodin, Peter Brinkhaus, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Peter M. W. Knijnenburg, Michael F. P. O'Boyle, Erven Rohou, Rizos Sakellariou, Henk Schepers, André Seznec, Elena Stöhr, Marco Verhoeven, Harry A. G. Wijshoff
    OCEANS: Optimizing Compilers for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:1351-1356 [Conf]
  10. Michel Barreteau, François Bodin, Peter Brinkhaus, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Peter M. W. Knijnenburg, Michael F. P. O'Boyle, Erven Rohou, Rizos Sakellariou, André Seznec, Elena Stöhr, Menno Treffers, Harry A. G. Wijshoff
    OCEANS: Optimising Compilers for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1998, pp:1123-1130 [Conf]
  11. Michel Barreteau, François Bodin, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Toru Kisuki, Peter M. W. Knijnenburg, Paul van der Mark, Andy Nisbet, Michael F. P. O'Boyle, Erven Rohou, André Seznec, Elena Stöhr, Menno Treffers, Harry A. G. Wijshoff
    OCEANS - Optimising Compilers for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:1171-1175 [Conf]
  12. Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero
    Feasibility of QoS for SMT. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:535-540 [Conf]
  13. Peter M. W. Knijnenburg, Toru Kisuki, Kyle Gallivan
    Cache Models for Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2001, pp:254-261 [Conf]
  14. Peter M. W. Knijnenburg, Joost N. Kok
    On the Semantics of Atomized Statements - the Parallel-Choice Option (Extended Abstract). [Citation Graph (0, 0)][DBLP]
    FCT, 1991, pp:297-306 [Conf]
  15. Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    Generating new general compiler optimization settings. [Citation Graph (0, 0)][DBLP]
    ICS, 2005, pp:161-168 [Conf]
  16. Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Non-Singular Data Transformations: Definition, Validity and Applications. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1997, pp:309-316 [Conf]
  17. Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    On the impact of data input sets on statistical compiler tuning. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  18. Toru Kisuki, Peter M. W. Knijnenburg, Michael F. P. O'Boyle, François Bodin, Harry A. G. Wijshoff
    A Feasibility Study in Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    ISHPC, 1999, pp:121-132 [Conf]
  19. Joost N. Kok, Peter M. W. Knijnenburg
    Divergence Models for Atomized Statements and Parallel Choice. [Citation Graph (0, 0)][DBLP]
    ISTCS, 1993, pp:231-239 [Conf]
  20. Aart J. C. Bik, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    Reshaping Access Patterns for Generating Sparse Codes. [Citation Graph (0, 0)][DBLP]
    LCPC, 1994, pp:406-420 [Conf]
  21. Grigori Fursin, Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Evaluating Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    LCPC, 2002, pp:362-376 [Conf]
  22. Peter M. W. Knijnenburg, Frank Nordemann
    A Categorical Interpretation of Partial Function Logic and Hoare Logic. [Citation Graph (0, 0)][DBLP]
    LFCS, 1992, pp:229-240 [Conf]
  23. Rogier P. J. Pinkers, Peter M. W. Knijnenburg, Masayo Haneda, Harry A. G. Wijshoff
    Statistical Selection of Compiler Options. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 2004, pp:494-501 [Conf]
  24. Peter M. W. Knijnenburg, Toru Kisuki, Michael F. P. O'Boyle
    Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:171-187 [Conf]
  25. Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    Code Size Reduction by Compiler Tuning. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2006, pp:186-195 [Conf]
  26. Karine Heydemann, François Bodin, Peter M. W. Knijnenburg, Laurent Morin
    UFS: a global trade-off strategy for loop unrolling for VLIW architectures. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2006, v:18, n:11, pp:1413-1434 [Journal]
  27. Peter M. W. Knijnenburg
    Special Issue: 10th International Workshop on Compilers for Parallel Computers (CPC 2003). [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2006, v:18, n:11, pp:1333-1334 [Journal]
  28. Peter M. W. Knijnenburg, Toru Kisuki, Kyle Gallivan, Michael F. P. O'Boyle
    The effect of cache models on iterative compilation for combined tiling and unrolling. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2004, v:16, n:2-3, pp:247-270 [Journal]
  29. Peter M. W. Knijnenburg, Joost N. Kok
    The Semantics of the Combination of Atomized Statements and Parallel Choice. [Citation Graph (0, 0)][DBLP]
    Formal Asp. Comput., 1997, v:9, n:5-6, pp:518-536 [Journal]
  30. Peter M. W. Knijnenburg
    A Note on the Smyth Powerdomain Construction. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 1996, v:26, n:2, pp:133-139 [Journal]
  31. Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Nonsingular Data Transformations: Definition, Validity, and Applications. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 1999, v:27, n:3, pp:131-159 [Journal]
  32. Michael F. P. O'Boyle, Peter M. W. Knijnenburg
    Integrating Loop and Data Transformations for Global Optimization. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2002, v:62, n:4, pp:563-590 [Journal]
  33. Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández
    QoS for High-Performance SMT Processors in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:4, pp:24-31 [Journal]
  34. Peter M. W. Knijnenburg, Frank Nordemann
    Partial Hyperdoctrines: Categorical Models for Partial Function Logic and Hoare Logic. [Citation Graph (0, 0)][DBLP]
    Mathematical Structures in Computer Science, 1994, v:4, n:2, pp:117-146 [Journal]
  35. Henri E. Bal, Raoul Bhoedjang, Rutger F. H. Hofman, Ceriel J. H. Jacobs, Thilo Kielmann, Jason Maassen, Rob van Nieuwpoort, John Romain, Luc Renambot, Tim Rühl, Ronald Veldema, Kees Verstoep, Aline Baggio, Gerco Ballintijn, Ihor Kuz, Guillaume Pierre, Maarten van Steen, Andrew S. Tanenbaum, Gerben Doornbos, Desmond Germans, Hans J. W. Spoelder, Evert Jan Baerends, Stan J. A. van Gisbergen, Hamid Afsermanseh, G. Dick van Albada, Adam Belloum, David Dubbeldam, Zeger W. Hendrikse, Louis O. Hertzberger, Alfons G. Hoekstra, Kamil Iskra, Drona Kandhai, Dennis Koelma, Frank van der Linden, Benno J. Overeinder, Peter M. A. Sloot, Piero Spinnato, Dick H. J. Epema, Arjan J. C. van Gemund, Pieter Jonker, Andrei Radulescu, Kees van Reeuwijk, Henk J. Sips, Peter M. W. Knijnenburg, Michael S. Lew, Floris Sluiter, Lex Wolters, Hans Blom, Cees de Laat
    The Distributed ASCI Supercomputer Project. [Citation Graph (0, 0)][DBLP]
    Operating Systems Review, 2000, v:34, n:4, pp:76-96 [Journal]
  36. Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero
    Predictable Performance in SMT Processors: Synergy between the OS and SMTs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:7, pp:785-799 [Journal]
  37. Peter M. W. Knijnenburg, Jan van Leeuwen
    On Models for Propositional Dynamic Logic. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1991, v:91, n:2, pp:181-203 [Journal]
  38. Peter M. W. Knijnenburg, Toru Kisuki, Michael F. P. O'Boyle
    Combined Selection of Tile Sizes and Unroll Factors Using Iterative Compilation. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2003, v:24, n:1, pp:43-67 [Journal]
  39. Aart J. C. Bik, Peter Brinkhaus, Peter M. W. Knijnenburg, Harry A. G. Wijshoff
    The Automatic Generation of Sparse Primitives. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Math. Softw., 1998, v:24, n:2, pp:190-225 [Journal]
  40. S. van Haastregt, Peter M. W. Knijnenburg
    Interactive presentation: Feasibility of combined area and performance optimization for superscalar processors using random search. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:606-611 [Conf]
  41. Francisco J. Cazorla, Enrique Fernández, Peter M. W. Knijnenburg, Alex Ramírez, Rizos Sakellariou, Mateo Valero
    On the Problem of Minimizing Workload Execution Time in SMT Processors. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:66-73 [Conf]
  42. Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg
    Strategies for Compiling µ TC to Novel Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:127-138 [Conf]

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