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Vijay Sundaresan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Raja Vallée-Rai, Phong Co, Etienne Gagnon, Laurie J. Hendren, Patrick Lam, Vijay Sundaresan
    Soot - a Java bytecode optimization framework. [Citation Graph (0, 0)][DBLP]
    CASCON, 1999, pp:13- [Conf]
  2. Raja Vallée-Rai, Etienne Gagnon, Laurie J. Hendren, Patrick Lam, Patrice Pominville, Vijay Sundaresan
    Optimizing Java Bytecode Using the Soot Framework: Is It Feasible? [Citation Graph (0, 0)][DBLP]
    CC, 2000, pp:18-34 [Conf]
  3. Mark G. Stoodley, Vijay Sundaresan
    Automatically Reducing Repetitive Synchronization with a Just-in-Time Compiler for Java. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:27-36 [Conf]
  4. Vijay Sundaresan, Daryl Maier, Pramod Ramarao, Mark G. Stoodley
    Experiences with Multi-threading and Dynamic Class Loading in a Java Just-In-Time Compiler. [Citation Graph (0, 0)][DBLP]
    CGO, 2006, pp:87-97 [Conf]
  5. Vijay Sundaresan, Ranga Vemuri
    A Novel Approach to Performance-Oriented Datapath Allocation and Floorplanning. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:323-328 [Conf]
  6. Nikola Grcevski, Allan Kielstra, Kevin Stoodley, Mark G. Stoodley, Vijay Sundaresan
    Java Just-in-Time Compiler and Virtual Machine Improvements for Server and Middleware Applications. [Citation Graph (0, 0)][DBLP]
    Virtual Machine Research and Technology Symposium, 2004, pp:151-162 [Conf]
  7. Vijay Sundaresan, Laurie J. Hendren, Chrislain Razafimahefa, Raja Vallée-Rai, Patrick Lam, Etienne Gagnon, Charles Godin
    Practical virtual method call resolution for Java. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2000, pp:264-280 [Conf]

  8. Removing redundancy via exception check motion. [Citation Graph (, )][DBLP]

  9. Power invariant secure IC design methodology using reduced complementary dynamic and differential logic. [Citation Graph (, )][DBLP]

  10. Reduced Complementary Dynamic and Differential Logic: A CMOS Logic Style for DPA-Resistant Secure IC Design. [Citation Graph (, )][DBLP]

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