The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Bruno Riccò: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Davide Bruni, Luca Benini, Bruno Riccò
    System lifetime extension by battery management: an experimental work. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:232-237 [Conf]
  2. Franco Gatti, Andrea Acquaviva, Luca Benini, Bruno Riccò
    Low Power Control Techniques For TFT LCD Displays. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:218-224 [Conf]
  3. Andrea Acquaviva, Luca Benini, Bruno Riccò
    Processor frequency setting for energy minimization of streaming multimedia application. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:249-253 [Conf]
  4. Alessandro Bogliolo, Luca Benini, Bruno Riccò
    Power Estimation of Cell-Based CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:433-438 [Conf]
  5. Andrea Acquaviva, Luca Benini, Bruno Riccò
    An adaptive algorithm for low-power streaming multimedia processing. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:273-279 [Conf]
  6. Cecilia Metra, Michele Favalli, Bruno Riccò
    On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:763- [Conf]
  7. Cecilia Metra, Michele Favalli, Bruno Riccò
    Highly Testable and Compact 1-out-of-n Code Checker with Single Output. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:981-982 [Conf]
  8. Cecilia Metra, Luca Schiano, Bruno Riccò, Michele Favalli
    Self-Checking Scheme for the On-Line Testing of Power Supply Noise. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:832-836 [Conf]
  9. Michele Sama, Vincenzo Pacella, Elisabetta Farella, Luca Benini, Bruno Riccò
    3dID: a low-power, low-cost hand motion capture device. [Citation Graph (0, 0)][DBLP]
    DATE Designers' Forum, 2006, pp:136-141 [Conf]
  10. Claudio Stagni, Carlotta Guiducci, Massimo Lanzoni, Luca Benini, Bruno Riccò
    Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:198-203 [Conf]
  11. Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
    Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:271-278 [Conf]
  12. Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
    A Highly Testable 1-out-of-3 CMOS Checker. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:279-286 [Conf]
  13. Cecilia Metra, Michele Favalli, Bruno Riccò
    CMOS Self Checking Circuits with Faulty Sequential Functional Block. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:133-141 [Conf]
  14. Cecilia Metra, Michele Favalli, Bruno Riccò
    Highly Testable and Compact 1-out-of-n CMOS Checkers. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:142-150 [Conf]
  15. Cecilia Metra, Michele Favalli, Bruno Riccò
    Compact and low power on-line self-testing voting scheme. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:137-147 [Conf]
  16. Cecilia Metra, Michele Favalli, Bruno Riccò
    Signal Coding Technique and CMOS Gates for Strongly Fault-Secure Combinational Functional Blocks. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:174-182 [Conf]
  17. Cecilia Metra, Stefano Di Francescantonio, Bruno Riccò, T. M. Mak
    Evaluation of Clock Distribution Networks' Most Likely Faults and Produced Effects. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:357-365 [Conf]
  18. Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
    Modeling of Broken Connections Faults in CMOS ICs. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:159-164 [Conf]
  19. Luigi Biagiotti, M. Gavesi, Claudio Melchiorri, Bruno Riccò
    A New Stress Sensor for Force/Torque Measurements. [Citation Graph (0, 0)][DBLP]
    ICRA, 2002, pp:1655-1660 [Conf]
  20. Elisabetta Farella, Augusto Pieracci, Davide Brunelli, Luca Benini, Bruno Riccò, Andrea Acquaviva
    Design and Implementation of WiMoCA Node for a Body Area Wireless Sensor Network. [Citation Graph (0, 0)][DBLP]
    ICW/ICHSN/ICMCS/SENET, 2005, pp:342-347 [Conf]
  21. Daniele Rossi, Cecilia Metra, Bruno Riccò
    Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:221-225 [Conf]
  22. Elisa Ficarra, Luca Benini, Bruno Riccò, G. Zuccheri
    Automated DNA sizing in atomic force microscope images. [Citation Graph (0, 0)][DBLP]
    ISBI, 2002, pp:453-456 [Conf]
  23. Davide Bertozzi, Luca Benini, Bruno Riccò
    Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:93-96 [Conf]
  24. Luca Benini, Davide Bruni, Bruno Riccò, Alberto Macii, Enrico Macii
    An adaptive data compression scheme for memory traffic minimization in processor-based systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:866-869 [Conf]
  25. Alessandro Bogliolo, Luca Benini, Bruno Riccò, Giovanni De Micheli
    Efficient switching activity computation during high-level synthesis of control-dominated designs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:127-132 [Conf]
  26. Luca Benini, Alessandro Bogliolo, Stefano Cavallucci, Bruno Riccò
    Monitoring system activity for OS-directed dynamic power management. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:185-190 [Conf]
  27. Davide Bertozzi, Luca Benini, Bruno Riccò
    Parametric timing and power macromodels for high level simulation of low-swing interconnects. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:307-312 [Conf]
  28. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò
    Gate-level current waveform simulation of CMOS integrated circuits. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:109-112 [Conf]
  29. Daniela De Venuto, Michael J. Ohletz, Bruno Riccò
    Testing of Analogue Circuits via (Standard) Digital Gates. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:112-119 [Conf]
  30. Daniela De Venuto, Michael J. Ohletz, Bruno Riccò
    Automatic Repositioning Technique for Digital Cell Based Window Comparators and Implementation within Mixed-Signal DfT Schemes. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:431-437 [Conf]
  31. Daniela De Venuto, Bruno Riccò
    Inductive Fault Analysis for Test and Diagnosis of DNA Sensor Arrays. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:311-316 [Conf]
  32. Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
    Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:486-495 [Conf]
  33. Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
    Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:466-475 [Conf]
  34. Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
    Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:865-874 [Conf]
  35. Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
    CMOS Design for Improved IC Testability. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:934- [Conf]
  36. Mattia Lanzoni, Piero Olivo, Bruno Riccò
    A Testing Technique to Characterize E^2PROM's Aging and Endurance. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:391-396 [Conf]
  37. Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
    CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:948-957 [Conf]
  38. Cecilia Metra, Michele Favalli, Bruno Riccò
    On-Line Testing Scheme for Clock's Faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:587-596 [Conf]
  39. Cecilia Metra, Michele Favalli, Bruno Riccò
    On-line detection of logic errors due to crosstalk, delay, and transient faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:524-533 [Conf]
  40. Cecilia Metra, Flavio Giovanelli, Mani Soma, Bruno Riccò
    Self-checking scheme for very fast clocks' skew correction. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:652-661 [Conf]
  41. Cecilia Metra, Andrea Pagano, Bruno Riccò
    On-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:939-947 [Conf]
  42. Piero Olivo, Maurizio Damiani, Bruno Riccò
    On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:936- [Conf]
  43. Daniele Rossi, Cecilia Metra, Bruno Riccò
    Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:27-31 [Conf]
  44. Elisabetta Farella, M. Sile O'Modhrain, Luca Benini, Bruno Riccò
    Gesture Signature for Ambient Intelligence Applications: A Feasibility Study. [Citation Graph (0, 0)][DBLP]
    Pervasive, 2006, pp:288-304 [Conf]
  45. Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Riccò
    Reliability evaluation of combinational logic circuits by symbolic simulation. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:235-243 [Conf]
  46. Cecilia Metra, Michele Favalli, Bruno Riccò
    Embedded two-rail checkers with on-line testing ability. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:145-150 [Conf]
  47. Cecilia Metra, Michele Favalli, Bruno Riccò
    Highly testable and compact single output comparator. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:210-215 [Conf]
  48. Cecilia Metra, Michele Favalli, Bruno Riccò
    Concurrent Checking of Clock Signal Correctness. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:4, pp:42-48 [Journal]
  49. Elisabetta Farella, Davide Brunelli, Luca Benini, Bruno Riccò, Maria Elena Bonfigli
    Pervasive Computing for Interactive Virtual Heritage. [Citation Graph (0, 0)][DBLP]
    IEEE MultiMedia, 2005, v:12, n:3, pp:46-58 [Journal]
  50. Andrea Acquaviva, Luca Benini, Bruno Riccò
    Energy characterization of embedded real-time operating systems. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2001, v:29, n:5, pp:13-18 [Journal]
  51. Maurizio Damiani, Piero Olivo, Bruno Riccò
    Analysis and Design of Linear Finite State Machines for Signature Analysis Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:9, pp:1034-1045 [Journal]
  52. Cecilia Metra, Michele Favalli, Bruno Riccò
    Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:6, pp:560-574 [Journal]
  53. Antonio Abramo, Franco Venturi, Enrico Sangiorgi, Jack M. Higman, Bruno Riccò
    A numerical method to compute isotropic band models from anisotropic semiconductor band structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:9, pp:1327-1336 [Journal]
  54. Andrea Acquaviva, Luca Benini, Bruno Riccò
    Software-controlled processor speed setting for low-power streamingmultimedia. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:11, pp:1283-1292 [Journal]
  55. Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
    Fault simulation of parametric bridging faults in CMOS IC's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:9, pp:1403-1410 [Journal]
  56. Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò
    Aliasing in signature analysis testing with multiple input shift registers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:12, pp:1344-1353 [Journal]
  57. Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
    An analytical model for the aliasing probability in signature analysis testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:11, pp:1133-1144 [Journal]
  58. Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
    Testability measures in pseudorandom testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:6, pp:794-800 [Journal]
  59. Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
    Fault simulation of unconventional faults in CMOS circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:5, pp:677-682 [Journal]
  60. Michele Favalli, Piero Olivo, Bruno Riccò
    A novel critical path heuristic for fast fault grading. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:4, pp:544-548 [Journal]
  61. Michele Favalli, Piero Olivo, Bruno Riccò
    A probabilistic fault model for `analog' faults in digital CMOS circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:11, pp:1459-1462 [Journal]
  62. Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
    On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:770-776 [Journal]
  63. Enrico Sangiorgi, Bruno Riccò, Franco Venturi
    MOS2: an efficient MOnte Carlo Simulator for MOS devices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:2, pp:259-271 [Journal]
  64. Franco Venturi, Enrico Sangiorgi, Rosella Brunetti, Wolfgang Quade, Carlo Jacoboni, Bruno Riccò
    Monte Carlo simulations of high energy electrons and holes in Si-n-MOSFET's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:10, pp:1276-1286 [Journal]
  65. Franco Venturi, R. Kent Smith, Enrico Sangiorgi, Mark R. Pinto, Bruno Riccò
    A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:4, pp:360-369 [Journal]
  66. Ruggero Feruglio, Fernanda Irrera, Bruno Riccò
    Microscopic aspects of defect generation in SiO2. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:9-11, pp:1427-1432 [Journal]
  67. Daniela De Venuto, Bruno Riccò
    Design and characterization of novel read-out systems for a capacitive DNA sensor. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2006, v:37, n:12, pp:1610-1619 [Journal]
  68. Carlotta Guiducci, Claudio Stagni, M. Brocchi, Massimo Lanzoni, Bruno Riccò, A. Nascetti, D. Caputo, G. de Cesare
    Innovative Optoelectronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:169-174 [Conf]
  69. Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
    Analysis of resistive bridging fault detection in BiCMOS digital ICs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:3, pp:342-355 [Journal]
  70. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò
    Gate-level power and current simulation of CMOS integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:4, pp:473-488 [Journal]
  71. Cecilia Metra, Stefano Di Francescantonio, Michele Favalli, Bruno Riccò
    Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:1, pp:23-29 [Journal]

  72. High Resolution Read-Out Circuit for DNA Label-Free Detection System. [Citation Graph (, )][DBLP]


  73. A smart wireless glove for gesture interaction. [Citation Graph (, )][DBLP]


Search in 0.004secs, Finished in 0.457secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002