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Kiran Puttaswamy: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong
    The emerging power crisis in embedded processors: what can a poor compiler do? [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:176-180 [Conf]
  2. Chinnakrishnan Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee
    Entropy-based low power data TLB design. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:304-311 [Conf]
  3. Jinwoo Kim, Kiran Puttaswamy
    Possibility and Limitation of a Hardware-Assisted Data Prefetching Framework Using Off-Line Training of Markovian Predictors. [Citation Graph (0, 0)][DBLP]
    CDES, 2005, pp:153-158 [Conf]
  4. Kiran Puttaswamy, Gabriel H. Loh
    Thermal analysis of a 3D die-stacked high-performance microprocessor. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:19-24 [Conf]
  5. Kiran Puttaswamy, Gabriel H. Loh
    Dynamic instruction schedulers in a 3-dimensional integration technology. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:153-158 [Conf]
  6. Kiran Puttaswamy, Gabriel H. Loh
    Implementing Caches in a 3D Technology for High Performance Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:525-532 [Conf]
  7. Abhijit Chatterjee, Peeter Ellervee, Vincent John Mooney III, Jun-Cheol Park, Kyu-won Choi, Kiran Puttaswamy
    System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:225-230 [Conf]
  8. Kiran Puttaswamy, Gabriel H. Loh
    Implementing Register Files for High-Performance Microprocessors in a Die-Stacked (3D) Technology. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:384-392 [Conf]
  9. Krishna V. Palem, Rodric M. Rabbah, Vincent John Mooney, Pinar Korkmaz, Kiran Puttaswamy
    Design space optimization of embedded memory systems via data remapping. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:28-37 [Conf]
  10. Kiran Puttaswamy, Gabriel H. Loh
    Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:622-625 [Conf]
  11. Kiran Puttaswamy, Gabriel H. Loh
    The impact of 3-dimensional integration on the design of arithmetic units. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  12. Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors. [Citation Graph (, )][DBLP]


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