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Dong-U Lee:
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Publications of Author
- Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung
Automating custom-precision function evaluation for embedded processors. [Citation Graph (0, 0)][DBLP] CASES, 2005, pp:22-31 [Conf]
- Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
MiniBit: bit-width optimization via affine arithmetic. [Citation Graph (0, 0)][DBLP] DAC, 2005, pp:837-840 [Conf]
- Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
A Hardware Gaussian Noise Generator for Channel Code Evaluation. [Citation Graph (0, 0)][DBLP] FCCM, 2003, pp:69-0 [Conf]
- Dong-U Lee, Wayne Luk, Connie Wang, Christopher Jones, Michael Smith, John D. Villasenor
A Flexible Hardware Encoder for Low-Density Parity-Check Codes. [Citation Graph (0, 0)][DBLP] FCCM, 2004, pp:101-111 [Conf]
- Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
Non-uniform Segmentation for Hardware Function Evaluation. [Citation Graph (0, 0)][DBLP] FPL, 2003, pp:796-807 [Conf]
- Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:364-373 [Conf]
- Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk
Ziggurat-based Hardware Gaussian Random Number Generator. [Citation Graph (0, 0)][DBLP] FPL, 2005, pp:275-280 [Conf]
- G. L. Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, C. C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. [Citation Graph (0, 0)][DBLP] FPT, 2005, pp:215-222 [Conf]
- Dong-U Lee, Hyungjin Kim, Steven Tu, Mohammad H. Rahimi, Deborah Estrin, John D. Villasenor
Energy-optimized image communication on resource-constrained sensor platforms. [Citation Graph (0, 0)][DBLP] IPSN, 2007, pp:216-225 [Conf]
- Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung
A Gaussian Noise Generator for Hardware-Based Simulations. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2004, v:53, n:12, pp:1523-1534 [Journal]
- Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
Optimizing Hardware Function Evaluation. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2005, v:54, n:12, pp:1520-1531 [Journal]
- Dong-U Lee, John D. Villasenor, Wayne Luk, Philip Heng Wai Leong
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2006, v:55, n:6, pp:659-671 [Journal]
- Dong-U Lee, John D. Villasenor
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:567-571 [Journal]
- Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides
Accuracy-Guaranteed Bit-Width Optimization. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1990-2000 [Journal]
- Dong-U Lee, Wayne Luk, John D. Villasenor, Guanglie Zhang, Philip Heng Wai Leong
A hardware Gaussian noise generator using the Wallace method. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2005, v:13, n:8, pp:911-920 [Journal]
- Dong-U Lee, Ray C. C. Cheung, John D. Villasenor
A Flexible Architecture for Precise Gamma Correction. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2007, v:15, n:4, pp:474-478 [Journal]
- Ray C. C. Cheung, Dong-U Lee, Wayne Luk, John D. Villasenor
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2007, v:15, n:8, pp:952-962 [Journal]
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